Datasheet
____________________________________________________ DS34S101, DS34S102, DS34S104, DS34S108
Rev: 032609 137 of 198
11.4.11
Clock Recovery
The base address for the TDMoP clock recovery register space is 0x48,000. Most of the registers in this section of
the TDMoP block are not documented. The HAL (Hardware Abstraction Layer) software manages these registers.
In the register descriptions in this section, the index port indicates port number: 1-8 for DS34S108, 1-4 for
DS34S104, 1-2 for DS34S102, 1 only for DS34S101.
Table 11-12. Clock Recovery Registers
Addr
Offset
Register Name Description Page
Port 1
0x0000
Control_Word_P1
Port1 clock recovery control bits
137
0x0004-00A0
Clk_recovery_cfg_reg1-40
Port1 clock recovery configuration registers (not documented)
---
Port 2
0x0400
Control_Word_P2
Port2 clock recovery control bits
137
0x0404-04A0
Clk_recovery_cfg_reg1-40
Port2 clock recovery configuration registers (not documented)
---
Port 3
0x0800
Control_Word_P3
Port3 clock recovery control bits
137
0x0804-08A0
Clk_recovery_cfg_reg1-40
Port3 clock recovery configuration registers (not documented)
---
Port 4
0x0C00
Control_Word_P4
Port4 clock recovery control bits
137
0x0C04-0CA0
Clk_recovery_cfg_reg1-40
Port4 clock recovery configuration registers (not documented)
---
Port 5
0x1000
Control_Word_P5
Port5 clock recovery control bits
137
0x1004-10A0
Clk_recovery_cfg_reg1-40
Port5 clock recovery configuration registers (not documented)
---
Port 6
0x1400
Control_Word_P6
Port6 clock recovery control bits
137
0x1404-14A0
Clk_recovery_cfg_reg1-40
Port6 clock recovery configuration registers (not documented)
---
Port 7
0x1800
Control_Word_P7
Port7 clock recovery control bits
137
0x1804-18A0
Clk_recovery_cfg_reg1-40
Port7 clock recovery configuration registers (not documented)
---
Port 8
0x1C00
Control_Word_P8
Port8 clock recovery control bits
137
0x1C04-1CA0
Clk_recovery_cfg_reg1-40
Port8 clock recovery configuration registers (not documented)
---
When using the clock recovery mechanism of a certain port, its Rx_PDVT parameter in the bundle configuration
must also be configured.
Clk_Recovery_Control_Word 0x000+(port-1)*0x400
Bits Data Element Name R/W
Reset
Value
Description
[31:1]
Reserved
-
0x0
Set according to the HAL function
[0]
System_Reset
W/O
0x0
1 = Reset the clock recovery system