Datasheet
____________________________________________________ DS34S101, DS34S102, DS34S104, DS34S108
Rev: 032609 110 of 198
AAL1_Bundle[n]_cfg[95:64] 0x200+n*4
Bits Data Element Name R/W
Reset
Value
Description
00 = Unstructured
01 = Structured
10 = Structured with CAS
11 = Reserved
[10:6]
Reserved
R/W
None
Must be set to zero
[5:4] Tx_cond_octet_type R/W None
Selects the ETH_cond_octet from ETH_cond_data_reg to
be transmitted towards packet network:
00 = ETH_cond_octet_a
01 = ETH_cond_octet_b
10 = ETH_cond_octet_c
11 = ETH_cond_octet_d
[3:2] Rx_AAL1_bundle_type R/W None
Bundle type of received packets:
00 = Unstructured
01 = Structured
10 = Structured with CAS
11 = Reserved
[1:0] Protection_mode R/W None
00 = Stop sending packets
01 = Send each packet once with the first header
10 = Send each packet once with the second header
11 = Send each packet twice: once with the first header
and once with the second header
See section 10.6.16.
AAL1_Bundle[n]_cfg[127:96] 0x300+n*4
Bits Data Element Name R/W
Reset
Value
Description
[31]
Reserved
R/W
None
Must be set to zero
[30:16] Rx_PDVT R/W None
Packet delay variation time value for AAL1 bundles. See
section 10.6.10. Bits [30:26] are used only when
unframed. The resolution is determined by the interface
type as follows:
For framed E1/T1: 0.5 ms
For unframed E1/T1 or serial bundles: 32 bit periods
For high speed interface: 128 bit periods
Allowed values:
Minimum allowed value: 3 (for all interfaces types)
For T1 SF, ESF: Rx_PDVT < 0x300
[15] Rx_CAS_src R/W None
Source of signaling conditioning towards TDM:
0 = SDRAM signaling jilter buffer
1 = Rx SW CAS table (section 11.4.13)
[14] Rx_cell_chk_ignore R/W None
0 = Discard AAL1 SAR PDUs with header parity/CRC
errors
1 = Ignore AAL1 SAR PDU header (CRC /parity) checks
Including AAL1 pointer parity error
[13]
Reserved
R/W
None
Must be set to zero
[12] OAM_ID_in_CW R/W None
0 = Ignore the OAM packet indication in the control word
1 = Check the OAM packet indication in the control word
See section 10.6.13.3.
[11] Rx_discard R/W None
0 = Pass through all incoming packets
1 = Discard all incoming packets
[10] Rx_dest R/W None
0 = TDM
1 = CPU
[9:8] Tx_MPLS_labels_l2tpv3_cookies R/W None
For MPLS:
00 = Reserved
01 = One label in the TX MPLS stack
10 = Two labels in the TX MPLS stack
11 = Three labels in the TX MPLS stack
For L2TPv3: