Datasheet

____________________________________________________ DS34S101, DS34S102, DS34S104, DS34S108
Rev: 032609 106 of 198
Packet_classifier_cfg_reg18 0x80
Bits Data Element Name R/W
Reset
Value
Description
in the VCCV_oam_value field below. See section
10.6.13.3.
[15:0] VCCV_oam_value R/W 0x0000
Indicates the value of the 16 most significant bits of the
control word for identifying VCCV OAM packets. The
combination of this field and VCCV_oam_mask_n above
specifies how the device does VCCV OAM identification.
For example, to identify VCCV OAM packets when the 4
most significant bits of the control word are equal to 0x1,
then set this field to 0x1000 and set VCCV_oam_mask_n
to 0xF000. See section 10.6.13.3.
CPU_rx_arb_max_fifo_level_reg 0xD4
Bits Data Element Name R/W
Reset
Value
Description
[31:25] Tx_arb_max_fifo_level R/W 0x00
Indicates the maximum level, which the TX_FIFO has
reached (given in dwords) since the last time this register
was read (or since reset). The value of the field is
automatically reset when this register is read by the CPU.
[24:10]
Reserved
-
0x0000
Must be set to zero
[9:0] Rx_arb_max_fifo_level R/W 0x000
Indicates the maximum level, which the RX_FIFO has
reached (given in dwords) since the last time this register
was read (or since reset). The value of the field is
automatically reset when this register is read by the CPU.