Datasheet

DS3232M
±5ppm, I
2
C Real-Time Clock with SRAM
18Maxim Integrated
Aging Offset Register (10h)
Temperature Registers (11h–12h)
BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0
SIGN DATA DATA DATA DATA DATA DATA DATA
0 0 0 0 0 0 0 0
The Aging Offset register takes a user-provided value to add to or subtract from the factory-trimmed value that adjusts the
accuracy of the time base. Use of the Aging Offset register is not needed to achieve the accuracy as defined in the Electrical
Characteristics tables.
The Aging Offset code is encoded in two’s complement, with bit 7 representing the SIGN bit. One LSB typically represents a
0.12ppm change in frequency. The change in ppm per LSB is the same over the operating temperature range. Positive offsets
slow the time base and negative offsets quicken the time base.
Temperature Register (Upper Byte = 11h)
BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0
SIGN DATA DATA DATA DATA DATA DATA DATA
0 0 0 0 0 0 0 0
Temperature Register (Lower Byte = 12h)
BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0
DATA DATA 0 0 0 0 0 0
0 0 0 0 0 0 0 0
Temperature is represented as a 10-bit code with a resolution of 0.25°C and is accessible at location 11h and 12h. The tem-
perature is encoded in two’s complement format. The upper 8 bits, the integer portion, are at location 11h and the lower 2 bits,
the fractional portion, are at location 12h. For example, 00011001 01b = +25.25°C. Upon power reset, the registers are set to
a default temperature of 0°C and the controller starts a temperature conversion. The temperature is read upon initial applica-
tion of V
CC
or I
2
C access on V
BAT
and once every second afterwards with V
CC
power or once every 10s with V
BAT
power. The
Temperature registers are also updated after each user-initiated conversion and are read only.