Datasheet

DS3232M
±5ppm, I
2
C Real-Time Clock with SRAM
11Maxim Integrated
Table 1. Power Control
To preserve the battery, the first time V
BAT
is applied
to the device the oscillator does not start up until V
CC
exceeds V
PF
or until a valid I
2
C address is written to
the device. Typical oscillator startup time is less than
1s. Approximately 2s after V
CC
is applied, or a valid
I
2
C address is written, the device makes a temperature
measurement and applies the calculated correction to
the oscillator. Once the oscillator is running, it continues
to run as long as a valid power source is available (V
CC
or V
BAT
), and the device continues to measure the tem-
perature and correct the oscillator frequency. On the first
application of V
CC
power, or (if V
BAT
powered) when a
valid I
2
C address is written to the device, the time and
date registers are reset to 01/01/00 01 00:00:00 (DD/MM/
YY DOW HH:MM:SS).
V
BAT
Operation
There are several modes of operation that affect the
amount of V
BAT
current that is drawn. While the device
is powered by V
BAT
and the serial interface is active,
the active battery current I
BATA
is drawn. When the
serial interface is inactive, the timekeeping current I
BATT
(which includes the averaged temperature-conversion
current I
BATTC
) is used. The temperature-conversion
current I
BATTC
is specified since the system must be
able to support the periodic higher current pulse and
still maintain a valid voltage level. The data-retention
current I
BATDR
is the current drawn by the device when
the oscillator is stopped (EOSC = 1). This mode can be
used to minimize battery requirements for periods when
maintaining time and date information is not necessary,
e.g., while the end system is waiting to be shipped to a
customer.
Pushbutton Reset Function
The device provides for a pushbutton switch to be con-
nected to the RST input/output pin. When the device is
not in a reset cycle, it continuously monitors RST for a
low-going edge. If an edge transition is detected, the
device debounces the switch by pulling RST low. After
the internal timer has expired (PB
DB
), the device con-
tinues to monitor the RST line. If the line is still low, the
device continuously monitors the line looking for a rising
edge. Upon detecting release, the device forces RST
low and holds it low for t
RST
. RST is also used to indi-
cate a power-fail condition. When V
CC
is lower than V
PF
,
an internal power-fail signal is generated, which forces
RST low. When V
CC
returns to a level above V
PF
, RST
is held low for approximately 250ms (t
REC
) to allow the
power supply to stabilize. If the oscillator is not running
when V
CC
is applied, t
REC
is bypassed and RST imme-
diately goes high. Assertion of the RST output, whether
by pushbutton or power-fail detection, does not affect
the device’s internal operation. RST output operation and
pushbutton monitoring are only available if V
CC
power is
available.
CONFIGURATION CONDITION I/O ACTIVE I/O INACTIVE
RST
V
CC
Only
(Figure 4)
V
CC
> V
PF
I
CCA
I
CCS
Inactive (High)
V
CC
< V
PF
Active (Low)
V
BAT
Only
(Figure 5)
EOSC = 0
I
BATA
I
BATT
Disabled (Low)
EOSC = 1
I
BATDR
Dual Supply
(Figure 6)
V
CC
> V
PF
I
CCA
I
CCS
Inactive (High)
V
CC
< V
PF
V
CC
> V
BAT
I
CCA
V
CC
> V
BAT
I
CCS
Active (Low)
V
CC
< V
BAT
I
BATA
V
CC
< V
BAT
I
BATT