Datasheet

DS3150
15 of 28
1.3 Diagnostics
PRBS Generator and Detector. The DS3150 contains on-board pseudorandom bit sequence (PRBS)
generator and detector circuitry for physical layer testing. The device generates and detects unframed
2
15
- 1 (DS3 or STS-1) or 2
23
- 1 PRBS patterns compliant with the ITU O.151 specification. The PRBS
generator is enabled through the TDS0 and TDS1 inputs (Table 2-A and Table 2-B). The PRBS detector
is always enabled and reports its status on the PRBS output pin. When the PRBS detector is out of
synchronization, the PRBS pin is forced high. When the detector synchronizes to an incoming PRBS
pattern, the PRBS pin is driven low and then pulses high, synchronous with RCLK, for each bit error
detected (Figure 1-6 and Figure 1-7). The PRBS detector and PRBS pin are only available in the TQFP
package.
Figure 1-6. PRBS Output with Normal RCLK Operation
Figure 1-7. PRBS Output with Inverted RCLK Operation
Loopbacks. The DS3150 has two internal loopbacks (Figure 1-1
). The analog loopback loops the
outgoing transmit waveform back to the receiver inputs. This is a local or equipment loopback. During
analog loopback data is transmitted normally on TX+ and TX- but the incoming data on RX+ and RX- is
ignored. The remote loopback loops recovered clock and data back through the LIU transmitter. During
remote loopback, recovered clock and data are output normally on RCLK, RPOS/RNRZ and
RNEG/RLCV, but the TPOS/TNRZ and TNEG pins are ignored. These two loopbacks are invoked using
the LBKS input pin (Table 2-A).
PRBS Detector
is Not in Sync
PRBS Detector is in sync; the PRBS
Signal Pulses High for Each Bit Error Detected
RCL
K
PRBS
ICE = 0 or 1
RCL
K
PRBS
PRBS Detector
is Not in Sync
PRBS Detector is in sync; the PRBS
Signal Pulses High for Each Bit Error Detected
ICE = Float