Datasheet
DS3112
78 of 133
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8 BERT
The BERT block can generate and detect the following patterns:
Pseudorandom patterns 2
7
- 1, 2
11
- 1, 2
15
- 1, and QRSS
• A repetitive pattern from 1 to 32 bits in length
Alternating (16-bit) words that flip every 1 to 256 words
The BERT receiver has a 32-bit bit counter and a 24-bit error counter. It can generate interrupts on
detecting a bit error, a change in synchronization, or if an overflow occurs in the bit and error counters.
See Section
8.1 for details on status bits and interrupts from the BERT block. To activate the BERT
block, the host must configure the BERT mux via the BERT mux control register (Section
8.1). Data can
be routed to the receive side of the BERT from either the T3/E3 framer or from one of the 28 T1 or 16/21
E1 receive ports. Data from the transmit side of the BERT can be inserted either into the T3/E3 framer or
into one of the 28 T1 or 16/21 E1 transmit ports. See
Figure 1-1 and Figure 1-2 for a visual description of
where data to and from the BERT can be placed.
8.1 BERT Register Description
Register Name:
BERTMC
Register Description:
BERT Mux Control Register
Register Address:
0x6Eh
Bit # 7 6 5 4 3 2 1
Name RBPS3 RBPS2 RBPS1
0
— — — RBPS4 RBPS0
Default 0 0 0 — — — 0 0
Bit # 15 14 13 12 11 10 9 8
Name — — — TBPS4 TBPS3 TBPS2 TBPS1 TBPS0
Default
— — —
0 0 0 0 0
Note: Bits that are underlined are read-only; all other bits are read-write.
Bits 0 to 4: Receive BERT Port Select Bits 0 to 4 (RBPS0 to RBPS4). These bits determine if data from any of
the 28 T1 or 16/21 E1 receive ports or the T3/E3 receive framer (with or without the overhead bits) will be routed
to the receive side of the BERT. If these bits are set to 11101, only the T3/E3 payload data will be routed to the
receive BERT. If these bits are set to 11110, all T3/E3 data (payload and the overhead bits) will be routed to the
receive BERT.
RBPS4:0
00000 No Data 01000 Port 8
00001 Port 1 01001 Port 9
00010 Port 2 01010 Port 10
00011 Port 3 01011 Port 11
00100 Port 4 01100 Port 12
00101 Port 5 01101 Port 13
00110 Port 6 01110 Port 14
00111 Port 7 01111 Port 15
10000 Port 16 11000 Port 24
10001 Port 17 11001 Port 25
10010 Port 18 11010 Port 26
10011 Port 19 11011 Port 27
10100 Port 20 11100 Port 28
10101 Port 21 11101 T3/E3 Framer (payload bits only)
10110 Port 22 11110 T3/E3 Framer (payload + overhead bits)
10111 Port 23 11111 Illegal State