Datasheet

DS3112
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Signal Name: CINT
Signal Description: CPU Bus Interrupt
Signal Type: Output (Open Drain)
This signal is an open-drain output that will be forced low if one or more unmasked interrupt sources
within the device is active. The signal will remain low until either the interrupt is serviced or masked.
Signal Name: CCS
Signal Description: CPU Bus Chip Select
Signal Type: Input
This active low signal must be asserted for the device to accept a read or write command from an external
host.
Signal Name: CALE
Signal Description: CPU Bus Address Latch Enable
Signal Type: Input
This input signal controls a latch that exists on the CA0 to CA7 inputs. When CALE is high, the latch is
transparent. The falling edge of CALE causes the latch to sample and hold the CA0 to CA7 inputs. In
nonmultiplexed bus applications, CALE should be tied high. In multiplexed bus applications, CA[7:0]
should be tied to CD[7:0] and the falling edge of CALE will latch the address.