Datasheet

DS28E05 1-Wire EEPROM
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Pin Descriptions
Pin Congurations
Detailed Description
TheDS28E05combines896bitsofuserEEPROMorga-
nized as seven 128-bit pages, 64 bits of administrative
datamemory,anda64-bitROMIDinasinglechip.Data
istransferredseriallythroughthe1-Wireprotocol,which
requires only a single data lead and a ground return.
The user memory can have unrestricted write access (fac-
torydefault),orcanbewriteprotectedorputinEPROM
emulation mode. Write protection prevents changes to
the memory data. EPROM emulation mode logically
ANDsmemorydatawithincomingnewdata,whichallows
changingbitsfrom1to0,butnotviceversa.Bychang-
ing one bit at a time this mode could be used to create
nonvolatile nonresettable counters. For more details
refer to ApplicationNote5042:Implementing Nonvolatile,
Nonresettable Counters for Embedded Systems.
The device’s 64-bit ROM ID can be used to electronically
identify the equipment in which the DS28E05 is used.
The ROM ID guarantees unique identification and is also
used to address the device in a multidrop 1-Wire network
environment, where multiple devices reside on a com-
mon 1-Wire bus and operate independently of each other.
Applicationsincludeaccessory/PCB identification,medi-
calsensorcalibrationdatastorage,analogsensorcalibra-
tion,andafter-marketmanagementofconsumables.
Overview
The block diagram in Figure 1 shows the relationships
between the major control and memory sections of the
DS28E05. The DS28E05 has three main data compo-
nents: seven 128-bit pages of user EEPROM, 64 bits
of administrative data memory, and a 64-bit ROM ID.
Figure 2 shows the hierarchic structure of the 1-Wire
protocol. The bus master must first provide one of the
fiveROMfunctioncommands:ReadROM,MatchROM,
Search ROM, Skip ROM, or Resume Communication.
The protocol required for these ROM function commands
is described in
Figure8.AfteraROMfunctioncommand
issuccessfullyexecuted,thememoryfunctionsbecome
accessible and the master can select one of the two
memory function commands. The function protocols are
described in
Figure6. All data is read and written least
significant bit first.
64-Bit ROM ID
Each DS28E05 contains a unique ROM ID that is 64 bits
long. The first 8 bits are a 1-Wire family code. The next
48 bits are a unique serial number. The last 8 bits are a
cyclicredundancycheck(CRC)ofthefirst56bits.See
Figure3fordetails.The1-WireCRCisgeneratedusing
a polynomial generator consisting of a shift register and
XORgatesasshowninFigure4.
PIN
NAME FUNCTION
SOT23 TSOC
2 3–6 N.C.
NotConnected
1 2 IO 1-WireBusInterface.Open-drainsignalthatrequiresanexternalpullupresistor.
3 1 GND GroundReference
N.C.
IO
GND
N.C.
N.C.
N.C.
TSOC
TOP VIEW
+
5
4
6
2
3
1
DS28E05
DS28E05
N.C.
1
3GND
IO
+
0Drr
SOT23
TOP VIEW
2