Datasheet

DS28E04-100: 4096-Bit 1-Wire Addressable EEPROM with PIO
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Figure 18. CRC-16 Hardware Description and Polynomial
Polynomial =
X
16
+ X
15
+ X
2
+ 1
X
0
X
1
X
2
X
3
X
4
X
5
X
6
X
7
X
8
X
9
X
10
X
11
X
12
X
13
X
14
X
15
X
16
1
st
STAGE
2
nd
STAGE
3
rd
STAGE
4
th
STAGE
6
th
STAGE
5
th
STAGE
7
th
STAGE
8
th
STAGE
9
th
STAGE
10
th
STAGE
11
th
STAGE
12
th
STAGE
13
th
STAGE
14
th
STAGE
15
th
STAGE
16
th
STAGE
INPUT DATA
CRC
OUTPUT
COMMAND-SPECIFIC 1-Wire COMMUNICATION PROTOCOL—LEGEND
SYMBOL DESCRIPTION
RST
1-Wire Reset Pulse generated by master.
PD
1-Wire Presence Pulse generated by slave.
Select
Command and data to satisfy the ROM function protocol.
WS
Command "Write Scratchpad".
RS
Command "Read Scratchpad".
CPS
Command "Copy Scratchpad".
RM
Command "Read Memory".
WREG
Command "Write Register".
PIOR
Command "PIO Access Read".
PIOW
Command "PIO Access Write".
PIOP
Command "PIO Access Pulse".
RAL
Command "Reset Activity Latches".
TA
Target address TA1, TA2.
TA-E/S
Target address TA1, TA2 with E/S byte.
<32 – T4:T0 bytes>
Transfer of as many bytes as needed to reach the end of the scratchpad for a given
target address.
<data to EOM>
Transfer of as many data bytes as are needed to reach the end of the memory.
<register data>
Data for registers at addresses 223h to 225h, 1 to 3 bytes, depending on start address.
CRC16\
Transfer of an inverted CRC16.
FF loop
Indefinite loop where the master reads FF bytes.
AA loop
Indefinite loop where the master reads AA bytes.
Programming
Data transfer to EEPROM; no activity on the 1-Wire bus permitted during this time.