Datasheet

DS2786 Stand-Alone OCV-Based Fuel Gauge
8 of 22
VOLTAGE MEASUREMENT
Battery voltage is measured at the V
IN
input with respect to V
SS
over a range of 0V to 4.5V and with a resolution of
1.22mV. The result is updated every 880ms and placed in the Voltage Register in two’s complement form. Voltages
above the maximum register value are reported as 7FFFh.
Figure 5. Voltage Register Format
MSB—Address 0Ch LSB—Address 0Dh
S 2
11
2
10
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
X X X
MSb LSb MSb LSb
“S”: sign bit(s), “X”: reserved
Units: 1.22mV
The input impedance of V
IN
is sufficiently large (>15MΩ) to be connected to a high-impedance voltage divider in
order to support multiple-cell applications. The pack voltage should be divided by the number of series cells to
present a single-cell average voltage to the V
IN
input.
Every 1024th conversion, the ADC measures its input offset to facilitate offset correction to improve voltage
accuracy. Offset correction occurs approximately every 15 minutes. The resulting correction factor is applied to the
subsequent 1023 measurements. During the offset correction conversion, the ADC does not measure the V
IN
signal. The voltage measurement just prior to the offset conversion is displayed in the voltage register. The OCV
algorithm automatically adjusts for the effects of the offset correction cycle.
AUXILARY INPUT MEASUREMENTS
The DS2786 has two auxiliary voltage measurement inputs, AIN0 and AIN1. Both are measured with respect to
V
SS
. These inputs are designed for measuring resistor ratios, particularly useful for measuring thermistor or pack
identification resistors. Prior to the beginning of a measurement cycle on AIN0 or AIN1, the V
OUT
pin outputs a
reference voltage in order to drive a resistive divider formed by a known resistor value, and the unknown resistance
to be measured. This technique delivers good accuracy at a reasonable cost, as it removes reference tolerance
from the error calculations. Measurements alternate between each input. Each auxiliary measurement is therefore
updated every 1760ms and placed in the corresponding AIN0 or AIN1 Register in two’s complement form.
Figure 6. Auxiliary Input Registers Format
AIN0
MSB—Address 08h LSB—Address 09h
S 2
10
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
X X X X
MSb LSb MSb LSb
“S”: sign bit, “X”: reserved
Units: V
OUT
× 1/2047
AIN1
MSB—Address 0Ah LSB—Address 0Bh
S 2
10
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
X X X X
MSb LSb MSb LSb
“S”: sign bit, “X”: reserved
Units: V
OUT
× 1/2047