Datasheet

DS26521 Single T1/E1/J1 Transceiver
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8.11.2 Transmitter
NRZ data arrives from the framer transmitter; the data is encoded with HDB3 or B8ZS or AMI. The encoded data
passes through a jitter attenuator if it is enabled for the transmit path. A digital sequencer and DAC are used to
generate transmit waveforms complaint with T1.102 and G.703 pulse templates.
A line driver is used to drive an internal matched impedance circuit for provision of 75Ω, 100Ω, 110Ω, and 120Ω
terminations. The transmitter couples to the E1 or T1 transmit twisted pair (or coaxial cable in some E1
applications) via a 1:2 step-up transformer. For the device to create the proper waveforms, the transformer used
must meet the specifications listed in
Table 8-32. The transmitter requires a transmit clock of 2.048MHz for E1 or
1.544MHz for T1/J1 operation.
The DS26521 drivers have a short-circuit and open-circuit detection driver-fail monitor. The TXENABLE pin can
high impedance the transmitter outputs for protection switching. The individual transmitters can also be placed in
high impedance through register settings. The DS26521 also has functionality for powering down the transmitters
individually. The relevant telecommunications specification compliance is shown in
Table 8-31.
Table 8-31. Telecommunications Specification Compliance for DS26521 Transmitters
TRANSMITTER FUNCTION TELECOMMUNICATIONS COMPLIANCE
T1 Telecom Pulse Template Compliance ANSI T1.403
T1 Telecom Pulse Template Compliance ANSI T1.102
Transmit Electrical Characteristics for E1 Transmission
and Return Loss Compliance
ITU-T G.703
Table 8-32. Transformer Specifications
SPECIFICATION RECOMMENDED VALUE
Turns Ratio 3.3V Applications 1:1 (receive) and 1:2 (transmit) ±2%
Primary Inductance
600μH minimum
Leakage Inductance
1.0μH maximum
Intertwining Capacitance 40pF maximum
Primary (Device Side)
1.0Ω maximum
Transmit Transformer DC
Resistance
Secondary
2.0Ω maximum
Primary (Device Side)
1.2Ω maximum
Receive Transformer DC
Resistance
Secondary
1.2Ω maximum