Datasheet

DS26521 Single T1/E1/J1 Transceiver
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Figure 12-7. Receive-Side Timing, Elastic Store Enabled (T1 Mode)..................................................................... 244
Figure 12-8. Receive Framer Timing—Line Side .................................................................................................... 244
Figure 12-9. Transmit Formatter Timing—Backplane ............................................................................................. 246
Figure 12-10. Transmit Formatter Timing, Elastic Store Enabled ........................................................................... 247
Figure 12-11. Transmit Formatter Timing—Line Side ............................................................................................. 247
Figure 12-12. JTAG Interface Timing Diagram........................................................................................................ 248
Figure 13-1. JTAG Functional Block Diagram......................................................................................................... 250
Figure 13-2. TAP Controller State Diagram............................................................................................................. 253
Figure 14-1. Pin Configuration—144-Ball CSBGA .................................................................................................. 256