Datasheet
DS26521 Single T1/E1/J1 Transceiver
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The Transmit FDL register (
T1TFDL) contains the facility data link (FDL) information that is to be inserted on a byte
basis into the outgoing T1 data stream. The LSB is transmitted first. In D4 mode, only the lower six bits are used.
8.9.5.4 Legacy T1 Receive FDL
It is recommended that the DS26521’s built-in BOC or HDLC controllers be used for most applications requiring
access to the FDL.
Table 8-16 shows the registers related to the receive FDL.
Table 8-16. Registers Related to T1 Receive FDL
REGISTER
FRAMER
ADDRESSES
FUNCTION
Receive FDL Register (T1RFDL) 062h FDL code used to insert transmit FDL.
Receive Latched Status Register 7(RLS7) 096h Receive FDL full bit is in this register.
Receive Interrupt Mask Register 7(RIM7) 0A6h Mask bit for RFDL full.
In the receive section, the recovered FDL bits or Fs bits are shifted bit-by-bit into the Receive FDL register
(
T1RFDL). Since the T1RFDL is 8 bits in length, it fills up every 2ms (8 x 250μs). The framer signals an external
controller that the buffer has filled via the
RLS7.2 bit. If enabled via RIM7.2, the INTB pin toggles low, indicating
that the buffer has filled and needs to be read. The user has 2ms to read this data before it is lost. Note that no
zero destuffing is applied for the data provided through the
T1RFDL register. The T1RFDL reports the incoming
facility data link (FDL) or the incoming Fs bits. The LSB is received first. In D4 framing mode,
T1RFDL updates on
multiframe boundaries and reports only the Fs bits.
8.9.6 E1 Data Link
Table 8-17 shows the registers related to E1 data link.
Table 8-17. Registers Related to E1 Data Link
REGISTER
FRAMER
ADDRESSES
FUNCTION
E1 Receive Align Frame Register (E1RAF) 064h Receive frame alignment register.
E1 Receive Non-Align Frame Register
(
E1RNAF)
065h Receive non-frame alignment register.
E1 Received Si Bits of the Align Frame
Register (
E1RSiAF)
066h Receive Si bits of the frame alignment frames.
Received Si Bits of the Non-Align Frame
Register
E1RSiNAF)
067h
Receive Si bits of the non-frame alignment
frames.
Received Sa4 to Sa8 Bits Register
(
E1RSa4 to E1RSa8)
069h, 06Ah,
06Bh, 06Ch,
06Dh
Receive Sa bits.
Transmit Align Frame Register (E1TAF) 164h Transmit align frame register.
Transmit Non-Align Frame Register
(
E1TNAF)
165h Transmit non-align frame register.
Transmit Si Bits of the Align Frame
Register (
E1TSiAF)
166h Transmit Si bits of the frame alignment frames.
Transmit Si Bits of the Non-Align Frame
Register (
E1TSiNAF)
167h
Transmit Si bits of the non-frame alignment
frames.
Transmit Sa4 to Sa8 Bits Register
(
E1TSa4 to E1TSa8)
169h, 16Ah,
16Bh, 16Ch,
16Dh
Transmit Sa4 to Sa8.
E1 Transmit Sa-Bit Control Register
(
E1TSACR)
114h Transmit sources of Sa control.