Datasheet

DS26521 Single T1/E1/J1 Transceiver
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8.9.4.5 Receive SLC-96 Operation (T1 Mode Only)
In an SLC-96-based transmission scheme, the standard Fs-bit pattern is robbed to make room for a set of
message fields. The SLC-96 multiframe is made up of six D4 superframes, thus it is 72 frames long. In the 72-
frame SLC-96 multiframe, 36 of the framing bits are the normal Ft pattern and the other 36 bits are divided into
alarm, maintenance, spoiler, and concentrator bits, as well as 12 bits of the normal Fs pattern. Additional SLC-96
information can be found in BellCore document TR-TSY-000008.
To enable the DS26521 to synchronize onto a SLC-96 pattern, the following configuration should be used:
•
RCR1.5 (RFM) = 1 Set to D4 framing mode.
•
RCR1.3 (SYNCC) = 1 Set to cross-couple Ft and Fs bits.
•
T1RCR2.4 (RSLC96) = 1 Enable SLC-96 synchronizer.
•
RCR1.7 (SYNCT) = 0 Set to minimum sync time.
The SLC-96 message bits can be extracted via the
T1RSLC1:T1RSLC3 registers. The status bit RSLC96 located
at
RLS7.3 is useful for retrieving SLC-96 message data. The RSLC96 bit indicates when the framer has updated
the data link registers
T1RSLC1:T1RSLC3 with the latest message data from the incoming data stream. Once the
RSLC96 bit is set, the user has 9ms (or until the next RSLC96 interrupt) to retrieve the most recent message data
from the
T1RSLC1:T1RSLC3 registers. Note that RSLC96 will not set if the DS26521 is unable to detect the 12-bit
SLC-96 alignment pattern.
8.9.5 T1 Data Link
8.9.5.1 T1 Transmit Bit-Oriented Code (BOC) Transmit Controller
The DS26521 contains a BOC generator on the transmit side and a BOC detector on the receive side. The BOC
function is available only in T1 mode.
Table 8-13 shows the registers related to the transmit bit-oriented code.
Table 8-13. Registers Related to T1 Transmit BOC
REGISTER
FRAMER
ADDRESSES
FUNCTION
Transmit BOC Register (T1TBOC) 163h Transmit bit-oriented message code register.
Transmit HDLC Control Register 2 (THC2) 113h Bit to enable sending of transmit BOC.
Transmit Control Register 1(TCR1) 181h Determines the sourcing of the F-bit.
Bits 0 to 5 in the T1TBOC register contain the BOC message to be transmitted. Setting SBOC = 1 (THC2.6)
causes the transmit BOC controller to immediately begin inserting the BOC sequence into the FDL bit position. The
transmit BOC controller automatically provides the abort sequence. BOC messages will be transmitted as long as
SBOC is set. Note that the TFPT (
TCR1.6) control bit must be set to 0 for the BOC message to overwrite F-bit
information being sampled on TSER.
8.9.5.1.1 To Transmit a BOC
1) Write 6-bit code into the T1TBOC register.
2) Set SBOC bit in
THC2 = 1.