Datasheet

DS26521 Single T1/E1/J1 Transceiver
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Table 8-9 shows registers that are related to setting up the framing.
Table 8-9. Registers Related to Setting Up the Framer
REGISTER
FRAMER
ADDRESSES
FUNCTION
Transmit Master Mode Register (TMMR) 180h T1/E1 mode.
Transmit Control Register 1 (TCR1) 181h Source of the F-bit.
Transmit Control Register 2 (TCR2) 182h F-bit corruption, selection of SLC-96.
Transmit Control Register 3 (TCR3) 183h ESF or D4 mode selection.
Receive Master Mode Register (RMMR) 080h T1/E1 selection for receiver.
Receive Control Register 1 (RCR1) 081h Resynchronization criteria for the framer.
Receive Control Register 2 (T1RCR2) 014h T1 remote alarm and OOF criteria.
Receive Control Register 2 (E1RCR2) 082h E1 receive loss of signal criteria selection.
Receive Latched Status Register 1 (RLS1) 090h Receive latched status 1.
Receive Interrupt Mask Register 1 (RIM1) 0A0h Receive interrupt mask 1.
Receive Latched Status Register 2 (RLS2) 091h Receive latched status 2.
Receive Interrupt Mask Register 2 (RIM2) 0A1h Receive interrupt mask 2.
Receive Latched Status Register 4 (RLS4) 093h Receive latched status 4.
Receive Interrupt Mask Register 4 (RIM4) 0A3h Receive interrupt mask 4.
Frames Out of Sync Count Register 1
(
FOSCR1)
054h Framer out of sync register 1.
Frames Out of Sync Count Register 2
(
FOSCR2)
055h Framer out of sync register 2.
E1 Receive Align Frame Register (E1RAF) 064h RAF byte.
E1 Receive Non-Align Frame Register
(
E1RNAF)
065h RNAF byte.
Transmit SLC-96 Data Link Register 1
(
T1TSLC1)
164h Transmit SLC-96 bits.
Transmit SLC-96 Data Link Register 2
(
T1TSLC2)
165h Transmit SLC-96 bits.
Transmit SLC-96 Data Link Register 3
(
T1TSLC3)
166h Transmit SLC-96 bits.
Receive SLC-96 Data Link Register 1
(
T1RSLC1)
064h Receive SLC-96 bits.
Receive SLC-96 Data Link Register 2
(
T1RSLC2)
065h Receive SLC-96 bits.
Receive SLC-96 Data Link Register 3
(
T1RSLC3)
066h Receive SLC-96 bits.