Datasheet

DS26521 Single T1/E1/J1 Transceiver
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Figure 12-7. Receive-Side Timing, Elastic Store Enabled (T1 Mode)
Figure 12-8. Receive Framer Timing—Line Side
RTIP, RRING
RCLK
CL
t
t
CP
CH
t
t
SU
t
HD
NOTE 1: RSYNC IS IN THE OUTPUT MODE.
NOTE 2: RSYNC IS IN THE INPUT MODE.
NOTE 3: F-BIT WHEN RIOCR.4 = 0, MSB OF TS0 WHEN RIOCR.4 = 1.
t
D3
t
D4
t
D4
t
D4
t
t
SU
HD
RSER/RSIG
RCHCLK
RCHBLK
RSYNC
1
RSYNC
2
RSYSCLK
SL
t
t
SP
SH
t
t
D4
RMSYNC
SEE NOTE 3