Datasheet

DS26521 Single T1/E1/J1 Transceiver
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9.6 BERT Register Definitions
Table 9-21. BERT Register Set
ADDR NAME DESCRIPTION R/W
1100h BAWC BERT Alternating Word Count Rate Register R
1101h BRP1 BERT Repetitive Pattern Set Register 1 R/W
1102h BRP2 BERT Repetitive Pattern Set Register 2 R/W
1103h BRP3 BERT Repetitive Pattern Set Register 3 R/W
1104h BRP4 BERT Repetitive Pattern Set Register 4 R/W
1105h BC1 BERT Control Register 1 R/W
1106h BC2 BERT Control Register 2 R/W
1107h BBC1 BERT Bit Count Register 1 R
1108h BBC2 BERT Bit Count Register 2 R
1109h BBC3 BERT Bit Count Register 3 R
110Ah BBC4 BERT Bit Count Register 4 R
110Bh BEC1 BERT Error Count Register 1 R
110Ch BEC2 BERT Error Count Register 2 R
110Dh BEC3 BERT Error Count Register 3 R
110Eh BLSR BERT Latched Status Register R
110Fh BSIM BERT Status Interrupt Mask Register R/W
Register Name:
BAWC
Register Description:
BERT Alternating Word Count Rate Register
Register Address:
1100h
Bit # 7 6 5 4 3 2 1 0
Name ACNT7 ACNT6 ACNT5 ACNT4 ACNT3 ACNT2 ACNT1 ACNT0
Default 0 0 0 0 0 0 0 0
Bits 7 to 0: Alternating Word Count Rate Bits 7 to 0 (ACNT[7:0]). When the BERT is programmed in the
alternating word mode, the words will repeat for the count loaded into this register, then flip to the other word and
again repeat for the number of times loaded into this register. ACNT0 is the LSB of the 8-bit alternating word count
rate counter.