Datasheet

DS26521 Single T1/E1/J1 Transceiver
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Register Name:
RIM3 (E1 Mode)
Register Description:
Receive Interrupt Mask Register 3
Register Address:
0A2h
Bit # 7 6 5 4 3 2 1 0
Name LORCC — V52LNKC RDMAC LORCD — V52LNKD RDMAD
Default 0 0 0 0 0 0 0 0
Note: For T1 mode, see RIM3.
Bit 7: Loss of Receive Clock Clear (LORCC).
0 = interrupt masked
1 = interrupt enabled
Bit 5: V5.2 Link Detected Clear (V52LNKC).
0 = interrupt masked
1 = interrupt enabled
Bit 4: Receive Distant MF Alarm Clear (RDMAC).
0 = interrupt masked
1 = interrupt enabled
Bit 3: Loss of Receive Clock Detect (LORCD).
0 = interrupt masked
1 = interrupt enabled
Bit 1: V5.2 Link Detect (V52LNKD).
0 = interrupt masked
1 = interrupt enabled
Bit 0: Receive Distant MF Alarm Detect (RDMAD).
0 = interrupt masked
1 = interrupt enabled