Datasheet

DS26521 Single T1/E1/J1 Transceiver
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Register Name:
E1RSAIMR (E1 Mode Only)
Register Description:
Receive Sa-Bit Interrupt Mask Register
Register Address:
014h
Bit # 7 6 5 4 3 2 1 0
Name — — — RSa4IM RSa5IM RSa6IM RSa7IM RSa8IM
Default 0 0 0 0 0 0 0 0
Bit 4: Sa4 Change Detect Interrupt Mask (RSa4IM). This bit will enable the change detect interrupt for the Sa4
bits. Any change of state of the Sa4 bit will then generate an interrupt in
RLS7.0 to indicate the change of state.
0 = Interrupt masked.
1 = Interrupt enabled.
Bit 3: Sa5 Change Detect Interrupt Mask (RSa5IM). This bit will enable the change detect interrupt for the Sa5
bits. Any change of state of the Sa5 bit will then generate an interrupt in
RLS7.0 to indicate the change of state.
0 = Interrupt masked.
1 = Interrupt enabled.
Bit 2: Sa6 Change Detect Interrupt Mask (RSa6IM). This bit will enable the change detect interrupt for the Sa6
bits. Any change of state of the Sa6 bit will then generate an interrupt in
RLS7.0 to indicate the change of state.
0 = Interrupt masked.
1 = Interrupt enabled.
Bit 1: Sa7 Change Detect Interrupt Mask (RSa7IM). This bit will enable the change detect interrupt for the Sa7
bits. Any change of state of the Sa7 bit will then generate an interrupt in
RLS7.0 to indicate the change of state.
0 = Interrupt masked.
1 = Interrupt enabled.
Bit 0: Sa8 Change Detect Interrupt Mask (RSa8IM). This bit will enable the change detect interrupt for the Sa8
bits. Any change of state of the Sa8 bit will then generate an interrupt in
RLS7.0 to indicate the change of state.
0 = Interrupt masked.
1 = Interrupt enabled.