Datasheet

DS26521 Single T1/E1/J1 Transceiver
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Register Name:
RDS0SEL
Register Description:
Receive Channel Monitor Select Register
Register Address:
012h
Bit # 7 6 5 4 3 2 1 0
Name RCM4 RCM3 RCM2 RCM1 RCM0
Default 0 0 0 0 0 0 0 0
Bits 4 to 0: Receive Channel Monitor Bits (RCM[4:0]). RCM0 is the LSB of a 5-bit channel select that
determines which receive DS0 channel data will appear in the RDS0M register.
Register Name:
RSIGC
Register Description:
Receive-Signaling Control Register
Register Address:
013h
Bit # 7 6 5 4 3 2 1 0
— — — RFSA1 RSFF RSFE RSIE
Name
— — —
CASMS
RSFF RSFE RSIE
Default 0 0 0 0 0 0 0 0
Bit 4 (T1 Mode): Receive Force Signaling All Ones (RFSA1).
0 = do not force robbed bit signaling to all ones
1 = force signaling bits to all ones on a per-channel basis according to the
T1RSAOI1:T1RSAOI3 registers.
Bit 4 (E1 Mode): CAS Mode Select (CASMS).
0 = The DS26521 will initiate a resync when two consecutive multiframe alignment signals have been
received with an error.
1 = The DS26521 will initiate a resync when two consecutive multiframe alignment signals have been
received with an error, or 1 multiframe has been received with all the bits in time slot 16 in state 0.
Alignment criteria is met when at least one bit in state 1 is present in the time slot 16 preceding the
multiframe alignment signal first detected (G.732 alternate criteria).
Bit 2: Receive-Signaling Force Freeze (RSFF). Freezes receive-side signaling at RSIG (and RSER if receive-
signaling reinsertion is enabled); will override receive freeze enable (RFE).
0 = do not force a freeze event
1 = force a freeze event
Bit 1: Receive-Signaling Freeze Enable (RSFE).
0 = no freezing of receive-signaling data will occur
1 = allow freezing of receive-signaling data at RSIG (and RSER if receive-signaling reinsertion is enabled)
Bit 0: Receive-Signaling Integration Enable (RSIE).
0 = signaling changes of state reported on any change in selected channels
1 = signaling must be stable for three multiframes in order for a change of state to be reported