Datasheet

DS26518 8-Port T1/E1/J1 Transceiver
33 of 312
9.3 Resets and Power-Down Modes
A hardware reset is issued by forcing the RESETB pin to logic low. The RESETB input pin resets all framers, LIUs,
and BERTs. Note that not all registers are cleared to 00h on a reset condition. The register space must be
reinitialized to appropriate values after a hardware or software reset has occurred. This includes writing
reserved locations to 00h.
Table 9-2. Reset Functions
RESET FUNCTION LOCATION COMMENTS
Hardware Device Reset
RESETB Pin
Transition to a logic 0 level resets the DS26518.
Hardware JTAG Reset
JTRST Pin
Resets the JTAG test port.
Global Software Reset GSRR1
Writing to this register resets the framers, LIUs and BERTs
(transmit and receive).
Framer Receive Reset RMMR.1 Writing to this bit resets the receive framer.
Framer Transmit Reset TMMR.1 Writing to this bit resets the transmit framer.
HDLC Receive Reset RHC.6 Writing to this bit resets the receive HDLC controller.
HDLC Transmit Reset THC1.5 Writing to this bit resets the transmit HDLC controller.
Elastic Store Receive Reset RESCR.2 Writing to this bit resets the receive elastic store.
Elastic Store Transmit Reset TESCR.2 Writing to this bit resets the transmit elastic store.
Bit Oriented Code Receive
Reset
T1RBOCC.7 Writing to this bit resets the receive BOC controller.
Loop Code Integration Reset
T1RDNCD1,
T1RUPCD1
Writing to these registers resets the programmable in-band
code integration period.
Spare Code Integration Reset T1RSCD1
Writing to this register resets the programmable in-band
code integration period.
The DS26518 has several features included to reduce power consumption. The individual LIU transmitters can be
powered down by setting the TPDE bit in the LIU Maintenance Control Register (
LMCR). Note that powering down
the transmit LIU results in a high-impedance state for the corresponding TTIPn and TRINGn pins and reduced
operating current. The RPDE in the
LMCR register can be used to power down the LIU receiver.
The TE (transmit enable) bit in the
LMCR register can be used to disable the TTIPn and TRINGn outputs and place
them in a high-impedance mode, while keeping the LIU in an active state (powered up). This is useful for
equipment protection-switching applications.