Datasheet

DS26518 8-Port T1/E1/J1 Transceiver
29 of 312
user must configure the SPI_CPOL and SPI_CPHA pins to describe which type of clock that the master device is
providing.
Figure 9-1. SPI Serial Port Access for Read Mode, SPI_CPOL = 0, SPI_CPHA = 0
1
A7
A13 A12 A11 A10 A9 A8
D7 D6 D5 D4 D3 D2 D1 D0
LSBMSB
LSB
MSB
SPI_SCLK
C
SB
SPI_MOSI
SPI_MISO
B
A6 A5 A4 A3 A2 A1
LSBMSB
A0
Figure 9-2. SPI Serial Port Access for Read Mode, SPI_CPOL = 1, SPI_CPHA = 0
SPI_SCLK
1
A7
A13 A12 A11 A10 A9 A8
D7 D6 D5 D4 D3 D2 D1 D0
LSBMSB
LSB
MSB
SPI_MOSI
SPI_MISO
B
A6 A5 A4 A3 A2 A1
LSBMSB
A0
C
SB
Figure 9-3. SPI Serial Port Access for Read Mode, SPI_CPOL = 0, SPI_CPHA = 1
SPI_SCLK
C
S
B
1
A
7
A
13
A
12
A
11
A
10
A
9
A
8
D7 D6 D5 D4 D3 D2 D1 D0
LSBMSB
LSB MSB
SPI_MOSI
SPI_MISO
B
A
6
A
5
A
4
A
3
A
2
A
1
LSBMSB
A
0
Figure 9-4. SPI Serial Port Access for Read Mode, SPI_CPOL = 1, SPI_CPHA = 1
SPI_SLCK
C
S
B
1
A
7
A
13
A
12
A
11
A
10
A
9
A
8
D7 D6 D5 D4 D3 D2 D1 D0
LSBMSB
LSB
MSB
SPI_MOSI
SPI_MISO
B
A
6
A
5
A
4
A
3
A
2
A
1
LSBMSB
A
0