Datasheet

DS26518 8-Port T1/E1/J1 Transceiver
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Register Name:
TH256SR1
Register Description:
Transmit HDLC-256 Status Register 1
Register Address:
1504h + (20h x (n - 1)) : where n = 1 to 8
Bit # 7 6 5 4 3 2 1 0
Name — — — — — TFF TFE THDA
Default 0 0 0 0 0 0 0 0
Bit 2: Transmit FIFO Full (TFF). When 0, the transmit FIFO contains 255 or less bytes of data. When 1, the
transmit FIFO is full.
Bit 1: Transmit FIFO Empty (TFE). When 0, the transmit FIFO contains at least one byte of data. When 1, the
transmit FIFO is empty.
Bit 0: Transmit HDLC-256 Data Storage Available (THDA). When 0, the transmit FIFO has less storage space
available in the transmit FIFO than the transmit HDLC-256 data storage available level (TDAL[4:0]). When 1, the
transmit FIFO has the same or more storage space available than the transmit FIFO HDLC-256 data storage
available level.
Register Name:
TH256SR2
Register Description:
Transmit HDLC-256 Status Register 2
Register Address:
1505h + (20h x (n - 1)) : where n = 1 to 8
Bit # 7 6 5 4 3 2 1 0
Name — — TFFL5 TFFL4 TFFL3 TFFL2 TFFL1 TFFL0
Default 0 0 0 0 0 0 0 0
Bits 5 to 0: Transmit FIFO Fill Level (TFFL[5:0]). These six bits indicate the number of eight byte groups
available for storage (do not contain data) in the transmit FIFO, e.g., a value of 21 (15h) indicates the FIFO has 168
(A8h) to 175 (AFh) bytes are available for storage.