Datasheet

DS26518 8-Port T1/E1/J1 Transceiver
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NAME PIN TYPE FUNCTION
MICROPROCESSOR INTERFACE
A12 C8
A11 A8
A10 B8
A9 F8
A8 B9
A7 A9
A6 C9
A5 D9
A4 E9
A3 F9
A2 B10
A1 A10
A0 C10
Input
Address [12:0]. This bus selects a specific register in the DS26518 during
read/write access. A12 is the MSB and A0 is the LSB.
D7/SPI_CPOL T9
Input/
Output
Data 7/SPI Interface Clock Polarity
D7: Bit 7 of the 8-bit data bus used to input data during register writes and data
outputs during register reads. Not driven when CSB = 1.
SPI_CPOL: This signal selects the clock polarity when SPI_SEL = 1. See Section
9.1.2 for detailed timing and functionality information. Default setting is low.
D6/SPI_CPHA N9
Input/
Output
Data 6/SPI Interface Clock Phase
D6: Bit 6 of the 8-bit data bus used to input data during register writes and data
outputs during register reads. Not driven when CSB = 1.
SPI_CPHA: This signal selects the clock phase when SPI_SEL = 1. See Section
9.1.2 for detailed timing and functionality information. Default setting is low.
D5/SPI_SWAP M9
Input/
Output
Data 5/SPI Bit Order Swap
D5: Bit 5 of the 8-bit data bus used to input data during register writes and data
outputs during register reads. Not driven when CSB = 1.
SPI_SWAP: This signal is active when SPI_SEL = 1. The address and data bit
order is swapped when SPI_SWAP is high. The R/W and B bit positions are
never changed in the control word.
0 = LSB is transmitted and received first.
1 = MSB is transmitted and received first.
D4 R8
Input/
Output
Data 4. Bit 4 of the 8-bit data bus used to input data during register writes and
data outputs during register reads. Not driven when CSB = 1.
D3 T8
Input/
Output
Data 3. Bit 3 of the 8-bit data bus used to input data during register writes and
data outputs during register reads. Not driven when CSB = 1.
D2/SPI_SCLK P8
Input/
Output
Data 2/SPI Serial Interface Clock
D2: Bit 2 of the 8-bit data bus used to input data during register writes and data
outputs during register reads. Not driven when CSB = 1.
SPI_SCLK: SPI Serial Clock Input when SPI_SEL = 1.
D1/SPI_MOSI L9
Input/
Ouput
Data 1/SPI Serial Interface Data Master Out-Slave In
D1: Bit 1 of the 8-bit data bus used to input data during register writes, and data
outputs during register reads. Not driven when CSB = 1.
SPI_MOSI: SPI Serial Data Input (Master Out-Slave In) when SPI_SEL = 1.
D0/SPI_MISO N8
Input/
Output
Data 0/SPI Serial Interface Data Master In-Slave Out
D0: Bit 0 of the 8-bit data bus used to input data during register writes and data
outputs during register reads. Not driven when CSB = 1.
SPI_MISO: SPI Serial Data Output (Master In-Slave Out) when SPI_SEL = 1.
CSB
T7 Input
Chip-Select Bar. This active-low signal is used to qualify register read/write
accesses. The RDB/DSB and WRB/ RWB signals are qualified with CSB.
RDB/
DSB
M8 Input
Read Bar/Data-Strobe Bar. This active-low signal along with CSB qualifies read
access to one of the DS26518 registers. The DS26518 drives the data bus with
the contents of the addressed register, in Intel bus mode, while RDB and CSB are
low or, in Motorola bus mode, while DSB and CSB are low and RWB is high.