Datasheet

DS26518 8-Port T1/E1/J1 Transceiver
113 of 312
10.1.5 HDLC-256 Register List
Table 10-6. HDLC-256 Register List
Note that only the HDLC-256 1 address is presented here. The same set of registers definitions applies for HDLC-256s 2 to 8 in accordance
with the DS26518 map offsets. HDLC-256 offset is {1500+ (n - 1) x 20 hex}, where n designates the HDLC-256 in question.
HDLC-256 REGISTER LIST
ADDRESS NAME DESCRIPTION R/W
1500h TH256CR1 Transmit HDLC-256 Control Register 1 R/W
1501h TH256CR2 Transmit HDLC-256 Control Register 2 R/W
1502h TH256FDR1 Transmit HDLC-256 FIFO Data Register 1 R/W
1503h TH256FDR2 Transmit HDLC-256 FIFO Data Register 2 R/W
1504h TH256SR1 Transmit HDLC-256 Status Register 1 R
1505h TH256SR2 Transmit HDLC-256 Status Register 2 R
1506h TH256SRL Transmit HDLC-256 Status Register Latched R/W
1507h — Reserved
1508h TH256SRIE Transmit HDLC-256 Status Register Interrupt Enable R/W
1509h — Reserved
150Ah — Reserved
150Bh — Reserved
150Ch — Reserved
150Dh — Reserved
150Eh — Reserved
150Fh — Reserved
1510h RH256CR1 Receive HDLC-256 Control Register 1 R/W
1511h RH256CR2 Receive HDLC-256 Control Register 2 R/W
1512h — Reserved
1513h — Reserved
1514h RH256SR Receive HDLC-256 Status Register R
1515h — Reserved
1516h RH256SRL Receive HDLC-256 Status Register Latched R/W
1517h — Reserved
1518h RH256SRIE Receive HDLC-256 Status Register Interrupt Enable R/W
1519h — Reserved
151Ah — Reserved
151Bh — Reserved
151Ch RH256FDR1 Receive HDLC-256 FIFO Data Register 1 R
151Dh RH256FDR2 Receive HDLC-256 FIFO Data Register 2 R
151Eh — Reserved
151Fh — Reserved