Datasheet

DS26518 8-Port T1/E1/J1 Transceiver
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FRAMER REGISTER LIST
ADDRESS NAME DESCRIPTION R/W
0AFh T1RDNCD2 Receive Down Code Definition Register 2 (T1 Mode Only) R/W
0B0h RRTS1 Receive Real-Time Status Register 1 R
0B1h — Reserved —
RRTS3 Receive Real-Time Status Register 3 (T1 Mode)
0B2h
RRTS3 Receive Real-Time Status Register 3 (E1 Mode)
R
0B3h — Reserved —
0B4h RRTS5 Receive Real-Time Status Register 5 (HDLC-64) R
0B5h RHPBA Receive HDLC-64 Packet Bytes Available Register R
0B6h RHF Receive HDLC-64 FIFO Register R
0B7h–0BFh — Reserved —
0C0h RBCS1 Receive Blank Channel Select Register 1 R/W
0C1h RBCS2 Receive Blank Channel Select Register 2 R/W
0C2h RBCS3 Receive Blank Channel Select Register 3 R/W
0C3h RBCS4 Receive Blank Channel Select Register 4 (E1 Mode Only) R/W
0C4h RCBR1 Receive Channel Blocking Register 1 R/W
0C5h RCBR2 Receive Channel Blocking Register 2 R/W
0C6h RCBR3 Receive Channel Blocking Register 3 R/W
0C7h RCBR4 Receive Channel Blocking Register 4 (E1 Mode Only) R/W
0C8h RSI1 Receive-Signaling Reinsertion Enable Register 1 R/W
0C9h RSI2 Receive-Signaling Reinsertion Enable Register 2 R/W
0CAh RSI3 Receive-Signaling Reinsertion Enable Register 3 R/W
0CBh RSI4 Receive-Signaling Reinsertion Enable Register 4 (E1 Mode Only) R/W
0CCh RGCCS1 Receive Gapped Clock Channel Select Register 1 R/W
0CDh RGCCS2 Receive Gapped Clock Channel Select Register 2 R/W
0CEh RGCCS3 Receive Gapped Clock Channel Select Register 3 R/W
0CFh RGCCS4 Receive Gapped Clock Channel Select Register (E1 Mode Only) R/W
0D0h RCICE1 Receive Channel Idle Code Enable Register 1 R/W
0D1h RCICE2 Receive Channel Idle Code Enable Register 2 R/W
0D2h RCICE3 Receive Channel Idle Code Enable Register 3 R/W
0D3h RCICE4 Receive Channel Idle Code Enable Register 4 (E1 Mode Only) R/W
0D4h RBPCS1 Receive BERT Port Channel Select Register 1 R/W
0D5h RBPCS2 Receive BERT Port Channel Select Register 2 R/W
0D6h RBPCS3 Receive BERT Port Channel Select Register 3 R/W
0D7h RBPCS4 Receive BERT Port Channel Select Register 4 (E1 Mode Only) R/W
0D8h–0DBh — Reserved —
0DCh RHCS1 Receive HDLC-256 Channel Select Register 1 R/W
0DDh RHCS2 Receive HDLC-256 Channel Select Register 2 R/W
0DEh RHCS3 Receive HDLC-256 Channel Select Register 3 R/W
0DFh RHCS4 Receive HDLC-256 Channel Select Register 4 (E1 Mode Only) R/W
0E0h–0EFh — Reserved —
0F0h–0FFh
Global
Registers
(Section
10.3)
See the Global Register list in
Table 10-2. Note that this space is
“Reserved” in Framers 2 to 8.
R/W
100h TDMWE1 Transmit Digital Milliwatt Enable Register 1 (T1 and E1 Modes) R/W
101h TDMWE2 Transmit Digital Milliwatt Enable Register 2 (T1 and E1 Modes) R/W
102h TDMWE3 Transmit Digital Milliwatt Enable Register 3 (T1 and E1 Modes) R/W
103h TDMWE4 Transmit Digital Milliwatt Enable Register 4 (T1 and E1 Modes) R/W
104h TJBE1 Transmit Jammed Bit Eight Stuffing Register 1 R/W
105h TJBE2 Transmit Jammed Bit Eight Stuffing Register 2 R/W
106h TJBE3 Transmit Jammed Bit Eight Stuffing Register 3 R/W
107h TJBE4 Transmit Jammed Bit Eight Stuffing Register 4 R/W
108h TDDS1 Transmit DDS Zero Code Register 1 R/W
109h TDDS2 Transmit DDS Zero Code Register 2 R/W