Datasheet

DS26518 8-Port T1/E1/J1 Transceiver
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10. DEVICE REGISTERS
Thirteen address bits are used to control the settings of the registers. The registers control functions of the framers,
LIUs, and BERTs within the DS26518. The map is divided into eight framers, followed by eight LIUs and eight
BERTs. Global registers (applicable to all eight transceivers and BERTs) are located within the address space of
Framer 1.
The register details are provided in the following tables. The framer registers bits are provided for Framer 1 and
address bits A[12:8] determine the framer addressed.
10.1 Register Listings
The framer registers have an offset of 200 hex, the LIU registers have an offset of 20 hex, and the BERT registers
have an offset of 10 hex for each transceiver.
Table 10-1. Register Address Ranges (in Hex)
CHANNEL GLOBAL
RECEIVE
FRAMER
TRANSMIT
FRAMER
LIU BERT
EXTENDED
BERT
HDLC-256
— 00F0–00FF — — — — — —
CH1 — 0000–00EF 0100–01EF 1000–101F 1100–110F 1400–140F 1500–151F
CH2 — 0200–02EF 0300–03EF 1020–103F 1110–111F 1410–141F 1520–153F
CH3 — 0400–04EF 0500–05EF 1040–105F 1120–112F 1420–142F 1540–155F
CH4 — 0600–06EF 0700–07EF 1060–107F 1130–113F 1430–143F 1560–157F
CH5 — 0800–08EF 0900–09EF 1080–109F 1140–114F 1440–144F 1580–159F
CH6 — 0A00–0AEF 0B00–0BEF 10A0–10BF 1150–115F 1450–145F 15A0–15BF
CH7 — 0C00–0CEF 0D00–0DEF 10C0–10DF 1160–116F 1460–146F 15C0–15DF
CH8 — 0E00–0EEF 0F00–0FEF 10E0–10FF 1170–117F 1470–147F 15E0–15FF