Datasheet

DS26514 4-Port T1/E1/J1 Transceiver
19-5856; Rev 4; 5/11 305 of 305
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17. DOCUMENT REVISION HISTORY
REVISION
NUMBER
REVISION
DATE
DESCRIPTION
0
022007
New Product Release.
1
041307
Updated data sheet to reflect new features with B1 die revision:
HDLC-256 Controller introduced in Section 9.10 and described in Section
9.10.3
Extended BERT Registers introduced in Section 9.13 and defined in Section
10.6.1
2
103007
Added more content to TCLKn pin description in Section 8.1.
3
101608
Finalized the specifications in this document and removed “preliminary”
designation.
Removed commercial temperature range product option from Ordering
Information table (page 1) and Operating Parameters (Section 12).
In the Absolute Maximum Ratings portion of Section 12, added Note 1 stating
that specifications to -40°C are guaranteed by design (GBD) and not production
tested.
Reduced the maximum supply current for the 1.8v supply from 70mA to 60mA.
Increased the typical supply currents for the 3.3v and 1.8v supplies to 215mA
and 45mA, respectively.
Added definition for Receive Master Mode Register bit 5 (RMMR.5) which, when
set, disables the receive-side synchronizer in the framer. This feature is new with
revision B1.
Added instruction in Step 5 of the Example Device Initialization and Sequence
(Section 9.4.1) to increase the frequency of the internally generated clock which
is supplied to the framers.
Replaced package drawing with link to package drawing (Section 16).
4
5/11
Correct TTIP and TRING pin identification in Figure 15.1 FROM: TTIP3 pins J3,
K3, TRING3 pins J1, J2 TO: TTIP3 pins J1, J2, TRING3 pins J3, K3. Removed
reference to TSYSCLK8 at C14. Changed table format to improve readability.
Section 12 Operating Parameters added lead and lead-free reflow temperatures.
Table 8-1 Pin Function Descriptions the following note was added to pin names
RDB/DSB
and WRB/RWB: Note: If SPI mode is selected by the SPI_SEL pin, this
pin must be connected through a 10K ohm resistor to the I/O Supply.