Datasheet

DS26514 4-Port T1/E1/J1 Transceiver
19-5856; Rev 4; 5/11 231 of 305
Register Name:
TRTS2
Register Description:
Transmit Real-Time Status Register 2 (HDLC-64)
Register Address:
1B1h + (200h x (n - 1)) : where n = 1 to 4
Bit #
7
6
5
4
3
2
1
0
Name
—
—
—
—
TEMPTY
TFULL
TLWM
TNF
Default
0
0
0
0
0
0
0
0
Note: All bits in this register are real time.
Bit 3: Transmit FIFO Empty (TEMPTY). A real-time bit that is set high when the FIFO is empty.
Bit 2: Transmit FIFO Full (TFULL). A real-time bit that is set high when the FIFO is full.
Bit 1: Transmit FIFO Below Low Watermark Condition (TLWM). Set when the transmit 64-byte FIFO empties
beyond the low watermark as defined by the transmit low watermark bits (TLWM).
Bit 0: Transmit FIFO Not Full Condition (TNF). Set when the transmit 64-byte FIFO has at least one byte
available.
Register Name:
TFBA
Register Description:
Transmit HDLC-64 FIFO Buffer Available Register
Register Address:
1B3h + (200h x (n - 1)) : where n = 1 to 4
Bit #
7
6
5
4
3
2
1
0
Name
Name—
TFBA6
TFBA5
TFBA4
TFBA3
TFBA2
TFBA1
TFBA0
Default
0
0
0
0
0
0
0
0
Bits 6 to 0: Transmit FIFO Bytes Available (TFBA6 to TFBA0). TFBA0 is the LSB.
Register Name:
THF
Register Description:
Transmit HDLC-64 FIFO
Register Address:
1B4 + (200h x (n-1)) : where n = 1 to 4
Bit #
7
6
5
4
3
2
1
0
Name
THD7
THD6
THD5
THD4
THD3
THD2
THD1
THD0
Default
0
0
0
0
0
0
0
0
Bit 7 : Transmit HDLC-64 Data Bit 7 (THD7). MSB of a HDLC-64 packet data byte.
Bit 6 : Transmit HDLC-64 Data Bit 6 (THD6).
Bit 5 : Transmit HDLC-64 Data Bit 5 (THD5).
Bit 4 : Transmit HDLC-64 Data Bit 4 (THD4).
Bit 3 : Transmit HDLC-64 Data Bit 3 (THD3).
Bit 2 : Transmit HDLC-64 Data Bit 2 (THD2).
Bit 1 : Transmit HDLC-64 Data Bit 1 (THD1).
Bit 0 : Transmit HDLC-64 Data Bit 0 (THD0). LSB of a HDLC-64 packet data byte.