Datasheet

DS26514 4-Port T1/E1/J1 Transceiver
19-5856; Rev 4; 5/11 218 of 305
Register Name:
TIOCR
Register Description:
Transmit I/O Configuration Register
Register Address:
184h + (200h x (n - 1)) : where n = 1 to 4
Bit #
7
6
5
4
3
2
1
0
Name
TCLKINV
TSYNCINV
TSSYNCINV
TSCLKM
TSSM
TSIO
TSDW
TSM
TCLKINV
TSYNCINV
TSSYNCINV
TSCLKM
TSSM
TSIO
—
TSM
Default
0
0
0
0
0
0
0
0
Bit 7: TCLKn Invert (TCLKINV)
0 = No inversion.
1 = Invert.
Bit 6: TSYNCn Invert (TSYNCINV)
0 = No inversion.
1 = Invert.
Bit 5: TSSYNCIOn (Input Mode Only) Invert (TSSYNCINV)
0 = No inversion.
1 = Invert.
Bit 4: TSYSCLKn Mode Select (TSCLKM)
0 = If TSYSCLKn is 1.544MHz.
1 = If TSYSCLKn is 2.048/4.096/8.192/16.384MHz or IBO enabled (see Section
9.8.2 for details on IBO
function).
Bit 3: TSSYNCIOn Mode Select (TSSM). Selects frame or multiframe mode for the TSSYNCIOn pin.
0 = Frame mode.
1 = Multiframe mode.
Bit 2: TSYNCn I/O Select (TSIO)
0 = TSYNCn is an input.
1 = TSYNCn is an output.
Bit 1: TSYNCn Double-Wide (TSDW) (T1 Mode Only) (Note: This bit must be set to zero when TSM = 1 or when
TSIO = 0.)
0 = Do not pulse double-wide in signaling frames.
1 = Do pulse double-wide in signaling frames.
Bit 0: TSYNCn Mode Select (TSM). Selects frame or multiframe mode for the TSYNCn pin.
0 = Frame mode.
1 = Multiframe mode.