Datasheet

DS26514 4-Port T1/E1/J1 Transceiver
19-5856; Rev 4; 5/11 187 of 305
Register Name:
RIM5
Register Description:
Receive Interrupt Mask 5 (HDLC-64)
Register Address:
0A4h + (200h x (n - 1)) : where n = 1 to 4
Bit #
7
6
5
4
3
2
1
0
Name
—
—
ROVR
RHOBT
RPE
RPS
RHWMS
RNES
Default
0
0
0
0
0
0
0
0
Bit 5: Receive FIFO Overrun (ROVR)
0 = Interrupt masked.
1 = Interrupt enabled.
Bit 4: Receive HDLC Opening Byte Event (RHOBT)
0 = Interrupt masked.
1 = Interrupt enabled.
Bit 3: Receive Packet End Event (RPE)
0 = Interrupt masked.
1 = Interrupt enabled.
Bit 2: Receive Packet Start Event (RPS)
0 = Interrupt masked.
1 = Interrupt enabled.
Bit 1: Receive FIFO Above High Watermark Set Event (RHWMS)
0 = Interrupt masked.
1 = Interrupt enabled.
Bit 0: Receive FIFO Not Empty Set Event (RNES)
0 = Interrupt masked.
1 = Interrupt enabled.