Datasheet

DS26514 4-Port T1/E1/J1 Transceiver
19-5856; Rev 4; 5/11 18 of 305
7. BLOCK DIAGRAMS
Figure 7-1. Block Diagram
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DS26514
FRAMER #4
FRAMER #3
FRAMER #2
T1/E1 FRAMER
HDLC
BERT
MICRO PROCESSOR
INTERFACE
JTAG PORT
CLOCK
GENERATION
LIU #4
LIU #3
LIU #2
LINE
INTERFACE
UNIT
INTERFACE #4
INTERFACE #3
INTERFACE #2
BACKPLANE
INTERFACE
ELASTIC
STORES
RTIP
TRING
RRING
TTIP
CONTROLLER
PORT
TEST
PORT
CLOCK
ADAPTER
RECEIVE
BACKPLANE
SIGNALS
TRANSMIT
BACKPLANE
SIGNALS
HARDWARE
ALARM
INDICATORS
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