Datasheet
DS26514 4-Port T1/E1/J1 Transceiver
19-5856; Rev 4; 5/11 138 of 305
Register Name:
GLISR1
Register Description:
Global LIU Interrupt Status Register 1
Register Address:
00FBh
Bit #
7
6
5
4
3
2
1
0
Name
--
--
--
--
LIS4
LIS3
LIS2
LIS1
Default
0
0
0
0
0
0
0
0
The GLISR1 register reports the LIU interrupt status for the T1/E1 LIUs of Channels 1 to 4. A logic one in the
associated bit location indicates a LIU has set its interrupt signal.
Bit 3: LIU Interrupt Status 4 (LIS4)
0 = LIU 4 has not issued an interrupt.
1 = LIU 4 has issued an interrupt.
Bit 2: LIU Interrupt Status 3 (LIS3)
0 = LIU 3 has not issued an interrupt.
1 = LIU 3 has issued an interrupt.
Bit 1: LIU Interrupt Status 2 (LIS2)
0 = LIU 2 has not issued an interrupt.
1 = LIU 2 has issued an interrupt.
Bit 0: LIU Interrupt Status 1 (LIS1)
0 = LIU 1 has not issued an interrupt.
1 = LIU 1 has issued an interrupt.
Register Name:
GHISR
Register Description:
Global HDLC-256 Interrupt Status Register
Register Address:
00F5h
Read/Write Function
R
Bit #
7
6
5
4
3
2
1
0
Name
--
--
--
--
HIS4
HIS3
HIS2
HIS1
Default
0
0
0
0
0
0
0
0
The GLISR register reports the HDLC-256 interrupt status for Channels 1 through 8. A logic one in the associated
bit location indicates a HDLC-256 has set its interrupt signal.
Bit 3 : HDLC-256 Interrupt Status 4
0 = HDLC-256 4 has not issued an interrupt.
1 = HDLC-256 4 has issued an interrupt.
Bit 2 : HDLC-256 Interrupt Status 3
0 = HDLC-256 3 has not issued an interrupt.
1 = HDLC-256 3 has issued an interrupt.
Bit 1 : HDLC-256 Interrupt Status 2
0 = HDLC-256 2 has not issued an interrupt.
1 = HDLC-256 2 has issued an interrupt.
Bit 0 : HDLC-256 Interrupt Status 1
0 = HDLC-256 1 has not issued an interrupt.
1 = HDLC-256 1 has issued an interrupt.










