Datasheet

DS26514 4-Port T1/E1/J1 Transceiver
19-5856; Rev 4; 5/11 133 of 305
Register Name:
GTCCR3
Register Description:
Global Transceiver Clock Control Register 3
Register Address:
00F4h
Bit #
7
6
5
4
3
2
1
0
Name
—
RSYSCLKSEL
TSYSCLKSEL
TCLKSEL
CLKOSEL3
CLKOSEL2
CLKOSEL1
CLKOSEL0
Default
0
0
0
0
0
0
0
0
Bit 6: RSYSCLKn Select (RSYSCLKSEL)
0 = Use RSYSCLKn pins for each receive system clock (Channels 1-4).
1 = Use BPCLK1 as the master clock for all four receive system clocks (Channels 1-4).
Bit 5: TSYSCLKn Select (TSYSCLKSEL)
0 = Use TSYSCLKn pins for each transmit system clock (Channels 1-4).
1 = Use BPCLK1 as the master clock for all four transmit system clocks (Channels 1-4).
Bit 4: TCLKn Select (TCLKSEL)
0 = Use TCLKn pins for each of the transmit clock (Channels 1-4).
1 = Use REFCLKIO as the master clock for all four transmit clocks (Channels 1-4).
Bits 3 to 0: Clock Out Frequency Select (CLKOSEL[3:0]. CLKO output pin will use MCLK (1.544MHz or
2.048MHz or scaled version) as its reference. The following table shows how to configure for each frequency. For
best jitter performance use a 2.048MHz oscillator for MCLK.
CLKOSEL[3:0] CLKO (kHz)
0000
2048
0001
4096
0010
8192
0011
16384
0100
1544
0101
3088
0110
6176
0111
12352
1000
1536
1001
3072
1010
6144
1011
12288
1100
32
1101
64
1110
128
1111
256