Datasheet

DS26504 T1/E1/J1/64KCC BITS Element
91 of 129
Register Name:
SR1
Register Description:
Status Register 1
Register Address:
14h
Bit # 7 6 5 4 3 2 1 0
Name — — — JALT — TCLE TOCD —
Default 0 0 0 0 0 0 0 0
HW
Mode
X X X X X X X X
Bits 0, 3, 5, 6, 7: Unused, must be set = 0 for proper operation.
Bit 1: Transmit Open-Circuit-Detect Condition (TOCD). Set when the device detects that the TTIP and TRING outputs are
open-circuited. Note: This function is not support in transmit 6312kHz mode and is not guaranteed by production testing.
Bit 2: Transmit Current-Limit-Exceeded Condition (TCLE). Set when the current limiter is activated whether the current
limiter is enabled or not. This is set at approximately 50mA (RMS) on the network side of the transformer in E1 operating
modes and 70mA (RMS) on the network side of the transformer in T1 operating modes. These values are approximate and are
not guaranteed by production testing. Note: This function is not supported in transmit CMI, 64kHz, or 6312kHz mode.
Bit 4: Jitter Attenuator Limit Trip Event (JALT). Set when the jitter attenuator FIFO reaches to within 4 bits of its useful
limit. This bit is cleared when read. Useful for debugging jitter-attenuation operation.