Datasheet

DS26504 T1/E1/J1/64KCC BITS Element
3 of 129
8. T1 FRAMER/FORMATTER CONTROL REGISTERS ....................................................40
8.1 T1 CONTROL REGISTERS............................................................................................................40
9. E1 FRAMER/FORMATTER CONTROL REGISTERS....................................................46
9.1 E1 CONTROL REGISTERS ...........................................................................................................46
9.2 E1 INFORMATION REGISTERS......................................................................................................49
10. I/O PIN CONFIGURATION OPTIONS ............................................................................53
11. T1 SYNCHRONIZATION STATUS MESSAGE ..............................................................56
11.1 T1 BIT-ORIENTED CODE (BOC) CONTROLLER ............................................................................56
11.2 TRANSMIT BOC ..........................................................................................................................56
11.3 RECEIVE BOC ............................................................................................................................57
12. E1 SYNCHRONIZATION STATUS MESSAGE..............................................................65
12.1 SA/SI BIT ACCESS BASED ON CRC4 MULTIFRAME ......................................................................65
12.1.1 Sa Bit Change of State......................................................................................................................... 66
12.2 ALTERNATE SA/SI BIT ACCESS BASED ON DOUBLE-FRAME ..........................................................77
13. LINE INTERFACE UNIT (LIU) ........................................................................................80
13.1 LIU OPERATION..........................................................................................................................81
13.2 LIU RECEIVER ............................................................................................................................81
13.2.1 Receive Level Indicator........................................................................................................................ 81
13.2.2 Receive G.703 Section 13 Synchronization Signal ............................................................................. 82
13.2.3 Monitor Mode ....................................................................................................................................... 82
13.3 LIU TRANSMITTER ......................................................................................................................82
13.3.1 Transmit Short-Circuit Detector/Limiter................................................................................................ 83
13.3.2 Transmit Open-Circuit Detector ........................................................................................................... 83
13.3.3 Transmit BPV Error Insertion ............................................................................................................... 83
13.3.4 Transmit G.703 Section 13 Synchronization Signal (E1 Mode)........................................................... 83
13.4 MCLK PRE-SCALER ...................................................................................................................83
13.5 JITTER ATTENUATOR ..................................................................................................................83
13.6 CMI (CODE MARK INVERSION) OPTION .......................................................................................84
13.7 LIU CONTROL REGISTERS ..........................................................................................................85
13.8 RECOMMENDED CIRCUITS...........................................................................................................93
13.9 COMPONENT SPECIFICATIONS.....................................................................................................95
14. LOOPBACK CONFIGURATION.....................................................................................99
15. 64KHZ SYNCHRONIZATION INTERFACE..................................................................100
15.1 RECEIVE 64KHZ SYNCHRONIZATION INTERFACE OPERATION .....................................................100
15.2 TRANSMIT 64KHZ SYNCHRONIZATION INTERFACE OPERATION ...................................................101
G.703 Level A................................................................................................................................................... 101
16. 6312KHZ SYNCHRONIZATION INTERFACE..............................................................102
16.1 RECEIVE 6312KHZ SYNCHRONIZATION INTERFACE OPERATION .................................................102
16.2 TRANSMIT 6312KHZ SYNCHRONIZATION INTERFACE OPERATION ...............................................102
17. JTAG BOUNDARY SCAN ARCHITECTURE AND TEST ACCESS PORT .................103
17.1 INSTRUCTION REGISTER ...........................................................................................................107
17.2 TEST REGISTERS......................................................................................................................108
17.3 BOUNDARY SCAN REGISTER .....................................................................................................108
17.4 BYPASS REGISTER ...................................................................................................................108