Datasheet

DS26503 T1/E1/J1 BITS Element
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Bits 4 to 7: Transmit Mode Configuration (TMODE[3:0]). Used to select the operating mode of the transmit path for the
DS26503.
TMODE3 TMODE2 TMODE1 TMODE0 Transmit Path Operating Mode
0 0 0 0 T1 D4
0 0 0 1 T1 ESF (Note: In this mode the TFSE (T1TCR2.6) bit should be
set = 0.)
0 0 1 0 J1 D4
0 0 1 1 J1 ESF
0 1 0 0 E1 FAS
0 1 0 0 E1 FAS + CAS (Note 1)
0 1 0 1 Reserved
0 1 1 0 E1 CRC4
0 1 1 0 E1 CRC4 + CAS (Note 1)
0 1 1 1 Reserved
1 0 0 0 E1 G.703 2048 kHz Synchronization Interface
1 0 0 1 Reserved
1 0 1 0 Reserved
1 0 1 1 6312kHz Synchronization Interface (Note 2)
1 1 0 0 Reserved
1 1 0 1 Reserved
Note 1:
The DS26503 does not have an internal source for CAS signaling and multiframe alignment generation. CAS signaling, and the
multiframe alignment word, must be embedded in the transmit data (in the TS16 position) present on the TSER pin and frame
aligned to sync signal on the TS pin.
Note 2:
In addition to setting the TMODE bits to 6312kHz Synchronization Interface mode, the Transmit PLL must also be configured to
transmit a 6312kHz signal through the Transmit PLL Control Register (TPCR.6 and TPCR.7)