Datasheet

DS26503 T1/E1/J1 BITS Element
Table 19-4. Receive Side AC Characteristics
Figure 19-10
19.4 Receive Side AC Characteristics
(V
DD
= 3.3V ±5%, T
A
= 0°C to +70°C for DS26503L; V
DD
= 3.3V ±5%, T
A
= -40°C to +85°C for
DS26503LN.) (Note 1,
)
PARAMETER SYMBOL MIN TYP MAX UNITS NOTES
2
648 3
RCLK Period t
CP
158.4
ns
4
t
CH
200
RCLK Pulse Width
t
CL
200
ns 5
t
CH
150
RCLK Pulse Width
t
CL
150
ns 6
RCLK to RSER Delay t
D1
20 ns
RCLK to RS Delay t
D2
50 ns
488
Note 1:
The timing parameters listed in this table are guaranteed by design (GBD).
Note 2:
E1 mode.
Note 3:
T1 or J1 mode.
Note 4:
6312kHz mode.
Note 5:
Jitter attenuator enabled in the receive path.
Note 6:
Jitter attenuator disabled or enabled in the transmit path.
Figure 19-10. Receive Timing, T1/E1
t
D1
t
D2
RSER
RS
RCLK
E1 = MSB of Channel 1
T1 = F-Bit
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