Datasheet
DS26503 T1/E1/J1 BITS Element
3 of 122
9. E1 FRAMER/FORMATTER CONTROL REGISTERS .................................................................46
9.1 E1 C
ONTROL REGISTERS ...........................................................................................................46
9.2 E1 I
NFORMATION REGISTERS......................................................................................................48
10. I/O PIN CONFIGURATION OPTIONS..........................................................................................52
11. T1 SYNCHRONIZATION STATUS MESSAGE ...........................................................................55
11.1 T1 BIT-ORIENTED CODE (BOC) CONTROLLER ............................................................................55
11.2 T
RANSMIT BOC .........................................................................................................................55
11.3 R
ECEIVE BOC ...........................................................................................................................56
12. E1 SYNCHRONIZATION STATUS MESSAGE ...........................................................................64
12.1 S
A/SI BIT ACCESS BASED ON CRC4 MULTIFRAME......................................................................64
12.2 A
LTERNATE SA/SI BIT ACCESS BASED ON DOUBLE-FRAME .........................................................74
13. LINE INTERFACE UNIT (LIU)......................................................................................................77
13.1 LIU O
PERATION .........................................................................................................................78
13.2 LIU R
ECEIVER ...........................................................................................................................78
13.2.1 Receive Level Indicator.........................................................................................................78
13.2.2 Receive G.703 Section 10 Synchronization Signal...............................................................79
13.2.3 Monitor Mode ........................................................................................................................79
13.3 LIU T
RANSMITTER .....................................................................................................................79
13.3.1 Transmit Short-Circuit Detector/Limiter.................................................................................80
13.3.2 Transmit Open-Circuit Detector ............................................................................................80
13.3.3 Transmit BPV Error Insertion ................................................................................................80
13.3.4 Transmit G.703 Section 10 Synchronization Signal (E1 Mode)............................................80
13.4 MCLK P
RE-SCALER ..................................................................................................................80
13.5 J
ITTER ATTENUATOR ..................................................................................................................80
13.6 CMI (C
ODE MARK INVERSION) OPTION.......................................................................................81
13.7 LIU C
ONTROL REGISTERS..........................................................................................................82
13.8 R
ECOMMENDED CIRCUITS ..........................................................................................................90
14. LOOPBACK CONFIGURATION ..................................................................................................95
15. 6312KHZ SYNCHRONIZATION INTERFACE .............................................................................96
15.1 R
ECEIVE 6312KHZ SYNCHRONIZATION INTERFACE OPERATION...................................................96
15.2 TRANSMIT 6312KHZ SYNCHRONIZATION INTERFACE OPERATION.................................................96
16. JTAG BOUNDARY SCAN ARCHITECTURE AND TEST ACCESS PORT ................................97
16.1 I
NSTRUCTION REGISTER...........................................................................................................101
16.2 T
EST REGISTERS .....................................................................................................................102
16.3 B
OUNDARY SCAN REGISTER ....................................................................................................102
16.4 B
YPASS REGISTER...................................................................................................................102
16.5 I
DENTIFICATION REGISTER .......................................................................................................102
17. FUNCTIONAL TIMING DIAGRAMS ..........................................................................................105
17.1 P
ROCESSOR INTERFACE ...........................................................................................................105
17.1.1 Parallel Port Mode ..............................................................................................................105
17.1.2 SPI Serial Port Mode ..........................................................................................................105
18. OPERATING PARAMETERS ....................................................................................................108
19. AC TIMING PARAMETERS AND DIAGRAMS..........................................................................110
19.1 M
ULTIPLEXED BUS ...................................................................................................................110