Datasheet

DS26303: 3.3V, T1/E1/J1, Short-Haul, Octal Line Interface Unit
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Table 10-4. Intel Write Cycle Characteristics
(V
DD
= 3.3V ±5%, Tj = -40°C to +125°C.) (Note 1) (See Figure 10-3 and Figure 10-4.)
SIGNAL
NAME(S)
SYMBOL DESCRIPTION (Note 2) MIN TYP MAX UNITS
WRB t1 Pulse Width 60 ns
CSB t2 Setup Time to WRB 0 ns
CSB t3 Hold Time to WRB 0 ns
AD[7:0] t4 Setup Time to ALE 10 ns
A[5:0] t5 Hold Time from WRB Inactive 2 ns
D[7:0], AD[7:0] t6 Input Setup time to WRB Inactive 40 ns
D[7:0], AD[7:0] t7 Input Hold Time to WRB Inactive 30 ns
RDYB t8 Enable Delay from CSB Active 0 13 ns
RDYB t9 Delay Time from WRB Active 40 ns
RDYB t10 Delay Time from WRB Inactive 0 12 ns
RDYB t11 Disable Delay Time from CSB Inactive 12 ns
ALE t12 Pulse Width 10 ns
ALE t13 Inactive Time to WRB Active 10 ns
A[5:0] t14 Hold Time from ALE Inactive 10 ns
A[5:0] t15 Setup Time to WRB Inactive 17 ns
Note 1: The timing parameters in this table are guaranteed by design (GBD).
Note 2: The input/output timing reference level for all signals is V
DD
/2.