Datasheet

DS26303: 3.3V, T1/E1/J1, Short-Haul, Octal Line Interface Unit
55 of 101
6.3 Transmitter
NRZ data arrives on TPOSn and TNEGn on the transmit system side. The TPOSn and TNEGn data is sampled on
the falling edge of TCLKn (Figure 10-12
).
The data is encoded with HDB3 or B8ZS or AMI encoding when single-rail mode is selected (only TDATn as the
data source). When in single-rail mode only, BPV errors can be inserted for test purposes by register BEIR
.
Encoded data is expected when dual-rail mode is selected. The encoded data passes through a jitter attenuator if it
is enabled for the transmit path. A digital sequencer and DAC generate transmit waveforms compliant with T1.102
and G.703 pulse masks.
A line driver drives an internal matched-impedance circuit for provision of 100Ω, 110Ω, 120Ω, and 75Ω termination.
The DS26303 drivers have short-circuit driver-fail-monitor detection. There is an OE pin that can high-Z the
transmitter outputs for protection switching. The individual transmitters can also be placed in high impedance by
register OEB
. The DS26303 also has functionality for powering down the transmitters individually. The registers
that control the transmitter operation are shown in Table 6-3
.
Table 6-1. Telecommunications Specification Compliance for DS26303 Transmitters
TRANSMITTER FUNCTION TELECOMMUNICATIONS COMPLIANCE
AMI Coding, B8ZS Substitution, DS1 Electrical
Interface
ANSI T1.102
T1 Telecom Pulse Mask Compliance ANSI T1.403
T1 Telecom Pulse Mask Compliance ANSI T1.102
Transmit Electrical Characteristics for E1
Transmission and Return Loss Compliance
ITU-T G.703
Table 6-2. Registers Related to Control of DS26303 Transmitters
REGISTER NAME FUNCTION
Transmit All-Ones Enable TAOE Transmit All-Ones Enable.
Driver Fault Monitor Status DFMS Driver Fault Status.
Driver Fault Monitor Interrupt Enable DFMIE Driver Fault Status Interrupt Mask.
Driver Fault Monitor Interrupt Status DFMIS Driver Fault Interrupt Status.
Global Configuration GC
Selection of the jitter attenuator in the transmit path, receive
path, or not used and code for B8ZS or HDB3 substitution.
Template Select Transmitter TST The transmitter that the template select applies to.
Template Select TS
The TS2 to TS0 bits for selection of the templates for
transmitter and match impedance for the receiver.
Output Enable Configuration OEB
This register can be used to place the transmitter outputs in
high-impedance mode.
Master Clock Selection MC Selects the MCLK frequency used for transmit and receive.
Single-Rail Mode Select SRMS
This register can be used to select between single-rail and
dual-rail mode.
Line Code Selection LCS
The individual LIU line codes can be selected to overwrite
the global setting.
Transmit Power-Down TPDE Individual transmitters can be powered down.
Individual Short-Circuit-Protection
Disable
ISCPD
This register allows the individual transmitters short-circuit
protection disable.
BERT Control BTCR
This register is used for sending different BERT patterns for
the individual transmitters.