Datasheet

DS26303: 3.3V, T1/E1/J1, Short-Haul, Octal Line Interface Unit
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Register Name:
BSRL
Register Description:
BERT Status Register Latched Register
Register Address:
0Eh
Bit # 7 6 5 4 3 2 1 0
Name — — — — PMSL
BEL BECL OOSL
Default 0 0 0 0 0 0 0 0
Bit 3: Performance-Monitoring Update Status Latched (PMSL). This bit is set when the PMS bit transitions from
0 to 1. A read operation clears this bit.
Bit 2: Bit Error Latched (BEL). This bit is set when a bit error is detected. A read operation clears this bit.
Bit 1: Bit-Error Count Latched (BECL). This bit is set when the BEC bit transitions from 0 to 1. A read operation
clears this bit.
Bit 0: Out-of-Synchronization Latched (OOSL). This bit is set when the OOS bit changes state. A read operation
clears this bit.
Register Name:
BSRIE
Register Description:
BERT Status Register Interrupt Enable Register
Register Address:
10h
Bit # 7 6 5 4 3 2 1 0
Name — — — — PMSIE BEIE BECIE OOSIE
Default 0 0 0 0 0 0 0 0
Bit 3: Performance-Monitoring Update Status-Interrupt Enable (PMSIE). This bit enables an interrupt if the
PMSL bit is set.
0 = interrupt disabled
1 = interrupt enabled
Bit 2: Bit-Error-Interrupt Enable (BEIE). This bit enables an interrupt if the BEL bit is set.
0 = interrupt disabled
1 = interrupt enabled
Bit 1: Bit-Error-Count Interrupt Enable (BECIE). This bit enables an interrupt if the BECL bit is set.
0 = interrupt disabled
1 = interrupt enabled
Bit 0: Out-of-Synchronization Interrupt Enable (OOSIE). This bit enables an interrupt if the OOSL bit is set.
0 = interrupt disabled
1 = interrupt enabled