Datasheet

DS26303: 3.3V, T1/E1/J1, Short-Haul, Octal Line Interface Unit
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Register Name:
GMR
Register Description:
Global Management Register
Register Address:
07h
Bit # 7 6 5 4 3 2 1 0
Name — — — — — JABWS1 JABWS0 RHPMC
Default 0 0 0 0 0 0 0 0
Bits 2 to 1: Jitter Attenuator Bandwidth Select [1:0] (JABWS[1:0]). These bits JABWS[1:0] select the jitter
attenuator bandwidth. See
Table 5-14 for details.
Table 5-14. Jitter Attenuator Bandwidth Selections
JABWS[1:0] BANDWIDTH CORNER
00 0.625Hz
01 1.25Hz
10 2.5Hz
11 5.0Hz
Bit 0: Receive Hitless-Protection Mode Control (RHPMC). This bit, when set while the OE pin is low, will force
all the receivers to turn off any internal impedance matching on RTIPn and RRINGn. This is used for hitless-
protection switching when the user would like a system requiring no external relays in the system.
Register Name:
BTCR
Register Description:
Bit Error-Rate Tester Control Register
Register Address:
10h
Bit # 7 6 5 4 3 2 1 0
Name BTS2 BTS1 BTS0 — — — — BERTE
Default 0 0 0 0 0 0 0 0
Bits 7 to 5: Bit Error-Rate Transceiver Select [2:0] (BTS[2:0]). These bits select the LIU that the BERT applies
to. This is only applicable if the BERTE bit is set.
Bit 0: Bit Error-Rate Tester Enable (BERTE). When this bit is set, the BERT is enabled. The BERT is only active
for one transceiver at a time selected by BTS[2:0].
Register Name:
BEIR
Register Description:
BPV Error Insertion Register
Register Address:
11h
Bit # 7 6 5 4 3 2 1 0
Name BEIR8 BEIR7 BEIR6 BEIR5 BEIR4 BEIR3 BEIR2 BEIR1
Default 0 0 0 0 0 0 0 0
Bits 7 to 0: BPV Error Insertion Register n (BEIRn). A 0-to-1 transition on this bit causes a single bipolar
violation (BPV) to be inserted into the transmit data stream channel n. This bit must be cleared and set again for a
subsequent error to be inserted.