Datasheet

DS26303: 3.3V, T1/E1/J1, Short-Haul, Octal Line Interface Unit
30 of 101
Register Name:
TAOE
Register Description:
Transmit All-Ones Enable Register
Register Address:
03h
Bit # 7 6 5 4 3 2 1 0
Name TAOE8 TAOE7 TAOE6 TAOE5 TAOE4 TAOE3 TAOE2 TAOE1
Default 0 0 0 0 0 0 0 0
Bits 7 to 0: Transmit All-Ones Enable Channel n (TAOEn). When this bit is set, a continuous stream of all ones
is sent on channel n (TTIPn and TRINGn). MCLK is used as a reference clock for the transmit all-ones signal. The
data arriving at TPOSn and TNEGn is ignored.
Register Name:
LOSS
Register Description:
Loss-of-Signal Status Register
Register Address:
04h
Bit # 7 6 5 4 3 2 1 0
Name LOSS8
LOSS7 LOSS6 LOSS5 LOSS4 LOSS3 LOSS2 LOSS1
Default 0 0 0 0 0 0 0 0
Bits 7 to 0: Loss-of-Signal Status Channel n (LOSSn). When this bit is set, an LOS condition has been detected
on LIUn. The criteria and conditions of LOS are described in Section
6.4.3: Loss of Signal.
Register Name:
DFMS
Register Description:
Driver Fault Monitor Status Register
Register Address:
05h
Bit # 7 6 5 4 3 2 1 0
Name DFMS8
DFMS7 DFMS6 DFMS5 DFMS4 DFMS3 DFMS2 DFMS1
Default 0 0 0 0 0 0 0 0
Bits 7 to 0: Driver Fault Monitor Status Channel n (DFMSn). When this bit is set, it indicates that there is a short
or open circuit at the transmit driver for LIUn.
Register Name:
LOSIE
Register Description:
Loss-of-Signal Interrupt Enable Register
Register Address:
06h
Bit # 7 6 5 4 3 2 1 0
Name LOSIE8 LOSIE7 LOSIE6 LOSIE5 LOSIE4 LOSIE3 LOSIE2 LOSIE1
Default 0 0 0 0 0 0 0 0
Bits 7 to 0: Loss-of-Signal Interrupt Enable Channel n (LOSIEn). When this bit is set, a change in the LOS
status for LIUn can generate an interrupt.