Datasheet

DS26303: 3.3V, T1/E1/J1, Short-Haul, Octal Line Interface Unit
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Table 5-4. BERT Register Set
ADDRESS
REGISTER NAME
HEX
PARALLEL
INTERFACE
A7–A0 (HEX)
SERIAL
INTERFACE
A7–A1 (HEX)
RW
BERT Control BCR 00 xxx00000 xx00000 RW
Reserved — 01 xxx00001 xx00001
BERT Pattern Configuration 1 BPCR1 02 xxx00010 xx00010 RW
BERT Pattern Configuration 2 BPCR2 03 xxx00011 xx00011 RW
BERT Seed/Pattern 1 BSPR1 04 xxx00100 xx00100 RW
BERT Seed/Pattern 2 BSPR2 05 xxx00101 xx00101 RW
BERT Seed/Pattern 3 BSPR3 06 xxx00110 xx00110 RW
BERT Seed/Pattern 4 BSPR4 07 xxx00111 xx00111 RW
Transmit Error-Insertion Control TEICR 08 xxx01000 xx01000 RW
Reserved — 09–0B
xxx01001–
xxx01010
xx01001–
xx01010—
—
BERT Status BSR 0C xxx01100 xx01100 R
Reserved — 0D xxx01101 xx01101 —
BERT Status Register Latched BSRL 0E xxx01110 xx01110 RW
Reserved — 0F xxx01111 xx01111 —
BERT Status Register Interrupt Enable BSRIE 10 xxx10000 xx10000 RW
Reserved — 11–13
xxx10001–
xxx10011
xx10001–
xx10011
—
Receive Bit-Error Count Register 1 RBECR1 14 xxx10100 xx10100 R
Receive Bit-Error Count Register 2 RBECR2 15 xxx10101 xx10101 R
Receive Bit-Error Count Register 3 RBECR3 16 xxx10110 xx10110 R
Reserved — 17 xxx10111 xx10111 —
Receive Bit Count Register 1 RBCR1 18 xxx11000 xx11000 R
Receive Bit Count Register 2 RBCR2 19 xxx11001 xx11001 R
Receive Bit Count Register 3 RBCR3 1A xxx11010 xx11010 R
Receive Bit Count Register 4 RBCR4 1B xxx11011 xx11011 R
Reserved — 1C–1E
xxx11100–
xxx11110
xx11100–
xx11110
—
Address Pointer for Bank Selection ADDP 1F xxx11111 xx11111 RW