Datasheet

DS26303: 3.3V, T1/E1/J1, Short-Haul, Octal Line Interface Unit
15 of 101
NAME PIN TYPE FUNCTION
SCLK/ALE/
ASB/TS2
86 I
Serial Clock/Address Latch Enable/Address Strobe
Bar/Template Selection 2
SCLK: In the serial host mode, this pin is the serial clock. Data on
SDI is clocked on the rising edge of SCLK. The data is clocked on
SDO on the rising edge of SCLK if CLKE is high. If CLKE is low
the data on SDO is clocked on the falling edge of SCLK.
ALE: In parallel Intel multiplexed mode, the address lines are
latched on the falling edge of ALE. Tie ALE pin high if using
nonmultiplexed mode.
ASB: In parallel Motorola multiplexed mode, the address is
sampled on the falling edge of ASB. Tie ASB pin high if using
nonmultiplexed mode.
TS2: In hardware mode, this pin signal is one of the template
selection bits. See
Table 5-11.
RDB/RWB/TS1 85 I
Read Bar/Read Write Bar/Template Selection 1
RDB: In Intel host mode, this pin must be low for read operation.
RWB: In Motorola mode, this pin is low for write operation and
high for read operation.
TS1: In hardware mode, this pin signal is one of the template
selection bits. See
Table 5-11.
SDI/WRB/DSB/TS0 84 I
Serial Data Input/Write Bar/Data Strobe Bar/Template
Selection 0
SDI: In the serial host mode, this pin is the serial input SDI. It is
sampled on the rising edge of SCLK. Data is input LSB first.
WRB: In Intel host mode, this pin is active low during write
operation. The data is sampled on the rising edge of WRB.
DSB: In the parallel Motorola mode, this pin is active low. During a
write operation the data is sampled on the rising edge of DSB.
During a read operation the data (D[7:0] or AD[7:0]) is driven on
the falling edge of DSB. In the nonmultiplexed Motorola mode, the
address bus (A[5:0]) is latched on the falling edge of DSB.
TS0: In hardware mode, this pin signal is one of the template
select bits. See
Table 5-11.