Datasheet

7Maxim Integrated
DS2483
Single-Channel 1-Wire Master
with Adjustable Timing and Sleep Mode
Active Pullup (APU)
The APU bit controls whether an active pullup (low
impedance transistor) or a passive pullup (R
WPU
resis-
tor) is used to drive a 1-Wire line from low to high. When
APU = 0, active pullup is disabled (resistor mode).
Enabling active pullup is generally recommended for
best 1-Wire bus performance. The active pullup does
not apply to the rising edge of a recovery after a short
on the 1-Wire line. If enabled, a fixed-duration active
pullup (typically 2.5Fs standard speed, 0.5Fs overdrive
speed) also applies in a reset/presence detect cycle on
the rising edges after t
RSTL
and after t
PDL
.
The circuit that controls rising edges operates as follows
(Figure 2): At t
1
, the pulldown (from DS2483 or 1-Wire
slave) ends. From this point on the 1-Wire bus is pulled
high through R
WPU
internal to the DS2483. V
CC
and the
capacitive load of the 1-Wire line determine the slope. In
case that active pullup is disabled (APU = 0), the resis-
tive pullup continues, as represented by the solid line.
With active pullup enabled (APU = 1), and when at t
2
the
voltage has reached the V
IAPO
threshold, the DS2483
activates a low-impedance pullup transistor, as repre-
sented by the dashed line. The active pullup remains
active until the end of the time slot (t
3
), after which the
resistive pullup continues. The shortest duration of the
active pullup is t
REC0
- (t
2
- t
1
) in a write-zero time slot
and the longest duration is t
W0L
+ t
REC0
- t
W1L
- (t
2
-
t
1
) in a write-one time slot. In a read-data time slot, the
active pullup duration is slave dependent. See the Strong
Pullup (SPU) section for a way to keep the pullup transis-
tor conducting beyond t
3
.
1-Wire Power Down (PDN)
The PDN bit is used to remove power from the 1-Wire
port, e.g., to force a 1-Wire slave to perform a power-on
reset. PDN can as well be used in conjunction with the
sleep mode (see Table 2 for details). While PDN is 1,
no 1-Wire communication is possible. To end the 1-Wire
power-down state, the PDN bit must be changed to 0.
Note: When writing to the device configuration register
with PDN = 1 to activate the 1-Wire power-down mode,
make sure that the SPU bit is 0.
Table 2. Effects of PDN and SLPZ
Figure 2. Rising Edge Pullup as Seen at the End of a Write-Zero Time Slot
PDN = SLPZ IS LOGIC 0 SLPZ IS LOGIC 1
0
•R
WPU
is connected.
•IOisatV
CC
, keeping the slaves powered.
•TheDS2483ispowereddown(sleepmode).
•R
WPU
is connected.
•IOisatV
CC
, keeping the slaves powered.
•TheDS2483ispoweredup(normaloperation).
1
•R
WPU
is disconnected.
•IOisat0V,causingtheslavestolosepower.
•TheDS2483ispowereddown(sleepmode).
•R
WPU
is disconnected.
•IOisat0V,causingtheslavestolosepower.
•TheDS2483ispoweredup.
APU = 0
NEXT TIME SLOT
APU = 1
V
CC
0V
1-Wire BUS IS
DISCHARGED
t
1
t
2
t
3
V
IAPO
V
IL1MAX
t
REC0