Datasheet

31Maxim Integrated
DS2465
DeepCover Secure Authenticator with
SHA-256 Coprocessor and 1-Wire Master Function
ABRIDGED DATA SHEET
Bit 7: Bit value (V). This bit specifies the branch direction to be taken if both, the first and the second read time slot
read a 0. If V = 0, a write-zero time slot is generated. If V = 1, a write-one time slot is generated.
Table 23. Parameter Byte Bitmap
X = Don’t care
1-Wire Triplet
Command Code 78h
Parameter Byte Branch Direction (Table 23)
Usage
To perform a 1-Wire Search ROM sequence; a full sequence requires this command
to be executed 64 times to identify and address one device.
Other Notes
Generates three time slots: two read time slots and one write time slot at the 1-Wire
line. The type of write time slot depends on the result of the read time slots and the
direction byte.
• If the read time slots are 0 and 1, they are followed by a write-zero time slot.
• If the read time slots are 1 and 0, they are followed by a write-one time slot.
• If the read time slots are both 1 (error case), the subsequent write time slot is a
write-one.
• If the read time slots are both 0, the parameter byte determines the type of the
subsequent write time slot.
Command Restrictions 1-Wire activity must have ended before the DS2465 can process this command.
Error Conditions (Error Response)
Command code is not acknowledged if 1WB = 1 at the time the command code is
received and the command is ignored.
MAC Notes N/A
I
2
C Busy Duration None
Command Duration
3 x t
SLOT
+ maximum 1.09µs, counted from the rising SCL edge of the parameter
byte acknowledge bit.
1-Wire Activity
Begins maximum 1.09µs after the rising SCL edge of the parameter byte acknowledge
bit.
Read Pointer Position 1-Wire Master Status register (for busy polling and data reading).
Master Status Bits Affected
1WB (set to 1 for 3 x t
SLOT
), SBR is updated at the first t
MSR
, TSB and DIR are
updated at the second t
MSR
(i.e., at t
SLOT
+ t
MSR
).
Master Configurations Affected 1WS, APU apply.
1-Wire Port Configurations Affected t
W0L
, t
W1L
, t
REC0
, and R
WPU
current values apply.
BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0
V X X X X X X X