Datasheet

DS2408
10 of 39
Figure 6. CHANNEL I/O AND RSTZ SIMPLIFIED LOGIC DIAGRAM
PIO
OUTPUT
LATCH
PIO ACTI
VITY
LATCH
EDGE
DETECTOR
PORT
FUNCTION
CONTROL
TO ACTIVITY LATCH
STATE REGISTER
TO PIO LOGIC
STATE REGISTER
TO PIO
OUTPUT LATCH
STATE REG.
R
Q
D
D
Q
S
Q
Q
"1"
CLR ACT LATCH
ROS
STRB
CHANNEL
I/O PIN
RSTZ
PIN
DATA
CLOCK
POWER ON
RESET
Conditional Search Channel Selection Mask Register
The data in this register controls whether a PIO channel qualifies for participation in the conditional
search command. To include one or more of the PIO channels, the bits in this register that correspond to
those channels need to be set to 1. This register can only be written through the Write Conditional Search
Registers command.
Conditional Search Channel Selection Mask Register Bitmap
ADDR
b7
b6
b5
b4
b3
b2
b1
b0
008Bh SM7 SM6 SM5 SM4 SM3 SM2 SM1 SM0
This register is read/write. Each bit is associated with the respective PIO channel as shown in Figure 7.
This register is cleared to 00h by a power-on reset